A 0-to-35mA NMOS Capacitor-Less LDO with Dual-Loop Regulation Achieving 3ns Response Time and 1pF-to-10nF Loading Range
In: ESSCIRC 2023- IEEE 49th European Solid State Circuits Conference (ESSCIRC); (2023-09-11) S. 253-256
Konferenz
Zugriff:
Titel: |
A 0-to-35mA NMOS Capacitor-Less LDO with Dual-Loop Regulation Achieving 3ns Response Time and 1pF-to-10nF Loading Range
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Autor/in / Beteiligte Person: | Hsu, Wen-Yang ; Aymerich, Joan ; Yang, Xiaolin ; Sawigun, Chutham ; Coppejans, Philippe ; Lopez, Carolina Mora |
Quelle: | ESSCIRC 2023- IEEE 49th European Solid State Circuits Conference (ESSCIRC); (2023-09-11) S. 253-256 |
Veröffentlichung: | 2023 |
Medientyp: | Konferenz |
ISBN: | 979-8-3503-0420-6 (print) ; 979-8-3503-0419-0 (print) |
ISSN: | 2643-1319 (print) |
DOI: | 10.1109/ESSCIRC59616.2023.10268699 |
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