AUTG: An Automatic UVM-based TestBench Generator for VLSI Chip Design Verification
In: International Conference on Microelectronics (ICM); (2023-12-17) S. 162-167
Konferenz
Zugriff:
Titel: |
AUTG: An Automatic UVM-based TestBench Generator for VLSI Chip Design Verification
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Autor/in / Beteiligte Person: | Ismael, Mohammad ; Hroub, Ayman ; Abu-Issa, Abdellatif |
Quelle: | International Conference on Microelectronics (ICM); (2023-12-17) S. 162-167 |
Veröffentlichung: | 2023 |
Medientyp: | Konferenz |
ISBN: | 979-8-3503-8082-8 (print) |
ISSN: | 2159-1679 (print) |
DOI: | 10.1109/ICM60448.2023.10378885 |
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