A low-temperature in-situ deposition and planarizing phosphosilicate glass process for filling high-aspect-ratio topography
In: Seventh International IEEE Conference on VLSI Multilevel Interconnection, 1990, S. 71-75
Konferenz
Zugriff:
Titel: |
A low-temperature in-situ deposition and planarizing phosphosilicate glass process for filling high-aspect-ratio topography
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Autor/in / Beteiligte Person: | Pennington, S. ; Hallock, D. |
Zeitschrift: | Seventh International IEEE Conference on VLSI Multilevel Interconnection, 1990, S. 71-75 |
Quelle: | Seventh International IEEE Conference on VLSI Multilevel Interconnection; (1990) S. 71-75 |
Veröffentlichung: | 1990 |
Medientyp: | Konferenz |
DOI: | 10.1109/VMIC.1990.127846 |
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