A novel CLB architecture to detect and correct SEU in LUTs of SRAM-based FPGAs
In: Proceedings. 2004 IEEE International Conference on Field- Programmable Technology; (2004) S. 121-128
Konferenz
Zugriff:
Titel: |
A novel CLB architecture to detect and correct SEU in LUTs of SRAM-based FPGAs
|
---|---|
Autor/in / Beteiligte Person: | Sundar, E.S. ; Chandrasekhar, V. ; Sashikanth, M. ; Kamakoti, V. ; Narayanan, V. |
Quelle: | Proceedings. 2004 IEEE International Conference on Field- Programmable Technology; (2004) S. 121-128 |
Veröffentlichung: | 2004 |
Medientyp: | Konferenz |
ISBN: | 0-7803-8651-5 (print) ; 978-0-7803-8651-8 (print) |
DOI: | 10.1109/FPT.2004.1393259 |
Sonstiges: |
|