A 15b-Linear, 20MS/s, 1.5b/Stage Pipelined ADC Digitally Calibrated with Signal-Dependent Dithering
In: Symposium on VLSI Circuits; (2006) S. 218-219
Konferenz
Zugriff:
Titel: |
A 15b-Linear, 20MS/s, 1.5b/Stage Pipelined ADC Digitally Calibrated with Signal-Dependent Dithering
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Autor/in / Beteiligte Person: | Shu, Y. S. ; Song, B. S. |
Quelle: | Symposium on VLSI Circuits; (2006) S. 218-219 |
Veröffentlichung: | 2006 |
Medientyp: | Konferenz |
ISBN: | 1-4244-0006-6 (print) ; 978-1-4244-0006-5 (print) |
ISSN: | 2158-5601 (print) ; 2158-5636 (print) |
DOI: | 10.1109/VLSIC.2006.1705388 |
Sonstiges: |
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