Low-power 7.2 GHz complementary all-N-transistor logic using 90 nm CMOS technology
In: IEEE International Symposium on Circuits and Systems (ISCAS); (2009-05-01) S. 389-392
Konferenz
Zugriff:
Titel: |
Low-power 7.2 GHz complementary all-N-transistor logic using 90 nm CMOS technology
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Autor/in / Beteiligte Person: | Hsu, Chia-Hao ; Sung, Gang-Neng ; Yao, Tuo-Yu ; Juan, Chun-Ying ; Lin, Yain-Reu ; Wang, Chua-Chin |
Quelle: | IEEE International Symposium on Circuits and Systems (ISCAS); (2009-05-01) S. 389-392 |
Veröffentlichung: | 2009 |
Medientyp: | Konferenz |
ISBN: | 978-1-4244-3827-3 (print) ; 978-1-4244-3828-0 (print) |
ISSN: | 0271-4302 (print) ; 2158-1525 (print) |
DOI: | 10.1109/ISCAS.2009.5117767 |
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