A 5Gb/s automatic sub-bit between-pair skew compensator for parallel data communications in 0.13µm CMOS
In: IEEE Symposium on VLSI Circuits; (2010-06-01) S. 71-72
Konferenz
Zugriff:
Titel: |
A 5Gb/s automatic sub-bit between-pair skew compensator for parallel data communications in 0.13µm CMOS
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Autor/in / Beteiligte Person: | Zheng, Yuxiang ; Liu, Jin ; Payne, Robert ; Morgan, Mark ; Lee, Hoi |
Quelle: | IEEE Symposium on VLSI Circuits; (2010-06-01) S. 71-72 |
Veröffentlichung: | 2010 |
Medientyp: | Konferenz |
ISBN: | 978-1-4244-5454-9 (print) ; 978-1-4244-7641-1 (print) ; 978-1-4244-5453-2 (print) |
ISSN: | 2158-5601 (print) ; 2158-5636 (print) |
DOI: | 10.1109/VLSIC.2010.5560278 |
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