Analysis and design considerations of static CMOS logics under process, voltage and temperature variation in 90nm CMOS process
In: International Conference on Information Science, Electronics and Electrical Engineering (ISEEE); Jg. 3 (2014-04-01) S. 1653-1656
Konferenz
Zugriff:
Titel: |
Analysis and design considerations of static CMOS logics under process, voltage and temperature variation in 90nm CMOS process
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Autor/in / Beteiligte Person: | Yang, Wei-Bin ; Lin, Yu-Yao ; Lo, Yu-Lung |
Quelle: | International Conference on Information Science, Electronics and Electrical Engineering (ISEEE); Jg. 3 (2014-04-01) S. 1653-1656 |
Veröffentlichung: | 2014 |
Medientyp: | Konferenz |
ISBN: | 978-1-4799-3196-5 (print) ; 978-1-4799-3195-8 (print) ; 978-1-4799-3197-2 (print) |
DOI: | 10.1109/InfoSEEE.2014.6946202 |
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