A 25Gb/s 185mW PAM-4 Receiver with 4-Tap Adaptive DFE and Sampling Clock Optimization in 55nm CMOS
In: IEEE International Symposium on Circuits and Systems (ISCAS); (2021-05-01) S. 1-4
Konferenz
Zugriff:
Titel: |
A 25Gb/s 185mW PAM-4 Receiver with 4-Tap Adaptive DFE and Sampling Clock Optimization in 55nm CMOS
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Autor/in / Beteiligte Person: | Tang, Liangxiao ; Gai, Weixin ; Yang, Chih-Kong Ken ; Ye, Bingyi ; Chen, Congcong |
Quelle: | IEEE International Symposium on Circuits and Systems (ISCAS); (2021-05-01) S. 1-4 |
Veröffentlichung: | 2021 |
Medientyp: | Konferenz |
ISBN: | 978-1-7281-9201-7 (print) |
ISSN: | 2158-1525 (print) |
DOI: | 10.1109/ISCAS51556.2021.9401299 |
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