Full-BNN: A Low Storage and Power Consumption Time-Domain Architecture based on FPGA
In: IEEE 33rd International Conference on Application-specific Systems, Architectures and Processors (ASAP); (2022-07-01) S. 98-105
Konferenz
Zugriff:
Titel: |
Full-BNN: A Low Storage and Power Consumption Time-Domain Architecture based on FPGA
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Autor/in / Beteiligte Person: | Zhang, Longlong ; Tang, Xuebin ; Hu, Xiang ; Peng, Yuanxi ; Zhou, Tong |
Quelle: | IEEE 33rd International Conference on Application-specific Systems, Architectures and Processors (ASAP); (2022-07-01) S. 98-105 |
Veröffentlichung: | 2022 |
Medientyp: | Konferenz |
ISBN: | 978-1-6654-8308-7 (print) |
ISSN: | 2160-052X (print) |
DOI: | 10.1109/ASAP54787.2022.00025 |
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