Design of a power-efficient Kogge–Stone adder by exploring new OR gate in 45nm CMOS process
In: Circuit World, Jg. 46 (2020-10-07), Heft 4, S. 257-269
Online
academicJournal
Zugriff:
Titel: |
Design of a power-efficient Kogge–Stone adder by exploring new OR gate in 45nm CMOS process
|
---|---|
Autor/in / Beteiligte Person: | John, Vimukth ; Sam, Shylu ; Radha, S. ; Paul, P. Sam ; Samuel, Joel |
Link: | |
Zeitschrift: | Circuit World, Jg. 46 (2020-10-07), Heft 4, S. 257-269 |
Veröffentlichung: | 2020 |
Medientyp: | academicJournal |
ISSN: | 0305-6120 (print) |
DOI: | 10.1108/CW-12-2018-0104 |
Sonstiges: |
|