Highly manufactured double-gate finFET with gate-source/drain underlap
In: IEEE Transactions on Electron Devices, Jg. 54 (2007-06-01), Heft 6, S. 1464-1470
Online
academicJournal
Zugriff:
Titel: |
Highly manufactured double-gate finFET with gate-source/drain underlap
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Autor/in / Beteiligte Person: | Yang, Ji-Woon ; Zeitzoff, Peter M. ; Tseng, Hsing-Huang |
Link: | |
Zeitschrift: | IEEE Transactions on Electron Devices, Jg. 54 (2007-06-01), Heft 6, S. 1464-1470 |
Veröffentlichung: | 2007 |
Medientyp: | academicJournal |
ISSN: | 0018-9383 (print) |
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