Design and Validation of a V-Gate n-MOSFET-Based RH CMOS Logic Circuit with Tolerance to the TID Effect
In: Electronics (Basel), Jg. 12 (2023-08-01), Heft 15
Online
academicJournal
Zugriff:
Titel: |
Design and Validation of a V-Gate n-MOSFET-Based RH CMOS Logic Circuit with Tolerance to the TID Effect
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Autor/in / Beteiligte Person: | Ki, Donghan ; Lee, Minwoong ; Lee, Namho ; Cho, Seongik |
Link: | |
Zeitschrift: | Electronics (Basel), Jg. 12 (2023-08-01), Heft 15 |
Veröffentlichung: | 2023 |
Medientyp: | academicJournal |
ISSN: | 2079-9292 (print) |
DOI: | 10.3390/electronics12153331 |
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