Rethinking deep-submicron circuit design: Interconnect delay need not increase as CMOS process geometries shrink, and current IC design methods should suffice for modules of up to 50,000 gates
In: Computer, Jg. 32 (1999-11-01), Heft 11, S. 25-33
Online
academicJournal
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Rethinking deep-submicron circuit design: Interconnect delay need not increase as CMOS process geometries shrink, and current IC design methods should suffice for modules of up to 50,000 gates
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Autor/in / Beteiligte Person: | Sylvester, Dennis ; Keutzer, Kurt |
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Zeitschrift: | Computer, Jg. 32 (1999-11-01), Heft 11, S. 25-33 |
Veröffentlichung: | 1999 |
Medientyp: | academicJournal |
ISSN: | 0018-9162 (print) |
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