Multilevel Reliability Simulation for IC Design
In: Bias Temperature Instability for Devices and Circuits. 2014, p719-749.
Buch
Zugriff:
Multilevel Reliability Simulation for IC Design With CMOS technology scaling, design for reliability becomes a vitally important part in today's design cycle. Aging mechanisms, such as NBTI and CHC, degrade [...]
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Multilevel Reliability Simulation for IC Design
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Autor/in / Beteiligte Person: | Sutaria, Ketul B ; Velamala, Jyothi B ; Ravi, Venkatesa ; Wirth, Gilson ; Sato, Takashi ; Cao, Yu |
Quelle: | Bias Temperature Instability for Devices and Circuits. 2014, p719-749. |
Veröffentlichung: | 2014 |
Medientyp: | Buch |
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