A 0.6-V 41.3-GHz Power-Scalable Sub-Sampling PLL in 55-nm CMOS DDC
In: IEICE Transactions on Electronics, Jg. E106.C (2023-10-01), Heft 10, S. 533
academicJournal
Zugriff:
Titel: |
A 0.6-V 41.3-GHz Power-Scalable Sub-Sampling PLL in 55-nm CMOS DDC
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Autor/in / Beteiligte Person: | Kyoya, TAKANO ; Minoru, FUJISHIMA ; Sangyeop, LEE ; Shuhei, AMAKAWA ; Takeshi, YOSHIDA |
Zeitschrift: | IEICE Transactions on Electronics, Jg. E106.C (2023-10-01), Heft 10, S. 533 |
Veröffentlichung: | 2023 |
Medientyp: | academicJournal |
ISSN: | 0916-8524 (print) ; 1745-1353 (print) |
DOI: | 10.1587/transele.2022CTS0001 |
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