Large CMOS imager using hadamard transform based multiplexing
United States: NASA Center for Aerospace Information (CASI), 2005
Online
report
We have developed a concept design for a large (~10k x 10k) CMOS imaging array whose elements are grouped in small subarrays with N pixels in each. The subarrays are code-division multiplexed using the Hadamard Transform (HT) based encoding. The Hadamard code improves the signal-to-noise (SNR) ratio to the reference of the read-out amplifier by a factor of N^1/2. This way of grouping pixels reduces the number of hybridization bumps by N. A single chip layout has been designed and the architecture of the imager has been developed to accommodate the HT base multiplexing into the existing CMOS technology. The imager architecture allows for a trade-off between the speed and the sensitivity. The envisioned imager would operate at a speed >100 fps with the pixel noise < 20 e-. The power dissipation would be ~100 pW/pixe1. The combination of the large format, high speed, high sensitivity and low power dissipation can be very attractive for space reconnaissance applications.
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Large CMOS imager using hadamard transform based multiplexing
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Autor/in / Beteiligte Person: | Karasik, Boris S ; Wadsworth, Mark V |
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Veröffentlichung: | United States: NASA Center for Aerospace Information (CASI), 2005 |
Medientyp: | report |
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