Fast-Locking All-Digital Phase-Locked Loop with Parallel Processing TDC and Interpolated DCO
2017
Hochschulschrift
Zugriff:
106
Phase-locked loops (PLL) generate a stable clock signal as a reference siganl to ensure circuits operate correctly. Nowadays, PLLs are widely used for SOC applications, such as wireless communication synthesizers, so it is indispensable in many applications. The analog phase-locked loop (APLL) has been developing for several years. However, in recent years, the all-digital phase-locked loop (ADPLL) has been gradually more mature, and it reveals its potential to replace the APLL. In this thesis, we implement the ADPLL by using full-custom design flow. The design concept of the first chip is, instead of the traditional time-to-digital converter (TDC) using cascade architecture, using a parallel processing TDC to reduce the operation time and the dynamic power consumption. In addition, the digitally controlled oscillator (DCO), adopting the interpolated mechanism, can reduce the output frequency Jitter in order to achieve a more accurate locking frequency. The proposed DCO with a linearly periodic structure has the operation range from 273MHz to 1110MHz. The design of the second chip, based on the first chip, adds an external adjustable divider so that the output signal can be locked to different frequencies. With the additional frequency tracking engine (FTE), the output can jump to the target frequency quickly to reduce the locking time. Therefore, the overall performance of the PLL is further improved. The output frequency of the first chip is locked at 800MHz. The measurement results show the RMS Jitter of 1.51ps, the Peak-to-Peak Jitter of 7.56ps, average power consumption of 11.34mW, and the core area of 0.1mm2. While the second chip locks at 800 MHz, simulation results show the Peak-to-Peak Jitter of 4.71ps, average power consumption of 11.7 mW, and the core area of 0.128 mm2.
Titel: |
Fast-Locking All-Digital Phase-Locked Loop with Parallel Processing TDC and Interpolated DCO
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Autor/in / Beteiligte Person: | Fan, Sheng-Kai ; 范盛凱 |
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Veröffentlichung: | 2017 |
Medientyp: | Hochschulschrift |
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