Design of Low Drop-out Linear Regulator with High PSRR and Low Regulation in 0.18-μm CMOS Process

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With the development of various electronic products, low drop-out linear regulators (Low drop-out Regulator) are widely used in portable electronic products because low drop-out linear regulators have high-speed transient response, low noise, and simple circuit architecture. Etc. In this thesis, a low drop-out linear regulator is designed. The bandgap reference voltage circuit uses the positive temperature coefficient and the negative temperature coefficient to cancel each other out, and produces an output voltage that is less affected by temperature changes. The required reference voltage solves the problem of temperature drift in general low drop-out linear regulators. The external output capacitor and its equivalent series resistor (ESR) are used to achieve frequency compensation to keep the system stable. In order to avoid the chip temperature being too high and burning, an over-temperature protection circuit is used. When the temperature is higher than 140 °C, the circuit will turn off the low drop-out linear regulator, when the temperature is lower than 100 °C, the circuit turns on the low drop-out linear regulator. The low drop-out linear regulator designed in this thesis is implemented by TSMC 0.18-μm 1P6M CMOS process. The input voltage is 1.8V-2V and the output voltage is 1.5V. The load current ranges from 1mA to 100mA, and the chip area is 0.5mm x 0.286mm, maximum power consumption is 181.2668mW.