Subtractive Photonics in Bulk CMOS

Much of humanity's technological advancement over the last few decades may be attributed to exponentially increasing computing power, the bedrock of which is bulk CMOS technology. Exponentially increasing data rates in communications have also played an important role, facilitated by advancements in fiber optics and integrated photonics. However, efforts to capitalize on the complementary strengths of these two domains by merging them, an idea first envisioned almost 40 years ago, have so far proven inadequate. All previous attempts to integrate photonics in bulk CMOS have required either expensive process modification or resulted in waveguides with high loss. In this thesis, we discuss our investigations of a new method of integrating photonics into bulk CMOS, which we call the method of subtractive photonics. This method entails forming waveguides out of the back-end interconnect of an electronic chip. The interconnect metal is designed to wrap around dielectric channels such that when the metal is etched away, suspended dielectric waveguides remain. Although this method introduces a large, previously untapped design space, since there are many interconnect layers that can be used in photonic structures, it also introduces certain severe constraints. This thesis explores some of the possibilities this design space opens up, as well as some of the challenges involved in designing photonics in a process intended only for electronics. As part of this exploration, we demonstrate waveguides with an upper bound on loss that is significantly lower than the best previously published waveguide loss for unmodified bulk CMOS. We also demonstrate the first measurements of waveguide loss at visible and near-visible wavelengths in unmodified bulk CMOS, as well as the first measurements of waveguide coupled photodiodes in unmodified bulk CMOS. These proof-of-concept results may pave the way towards fully integrated electronic-photonic systems in unmodified bulk CMOS.