Semiconductor substrate assemblies and methods for preparing and dicing the same

Andrews, Peter ; Brown, Elbert ; et al.

2005

Online Patent

Zugriff:

View record in USPTO Patent Applications (Volltext)

A method for forming semiconductor devices using a semiconductor substrate having first and second opposed surfaces and including first and second device regions includes directing a beam of laser light at the substrate such that the beam of laser light is focused within the substrate between the first and second surfaces thereof and the beam of laser light forms a thermally weakened zone (TWZ) in the substrate. The TWZ extends between the first and second device regions and defines a break line.

Titel:	Semiconductor substrate assemblies and methods for preparing and dicing the same
Autor/in / Beteiligte Person:	Andrews, Peter ; Brown, Elbert ; Negley, Gerald H.
Link:	View record in USPTO Patent Applications (Volltext)
Veröffentlichung:	2005
Medientyp:	Patent
Sonstiges:	Nachgewiesen in: USPTO Patent Applications Sprachen: English Document Number: 20050130390 Publication Date: June 16, 2005 Appl. No: 10/733845 Application Filed: December 11, 2003 Claim: 1. A method for forming semiconductor devices using a semiconductor substrate having first and second opposed surfaces and including first and second device regions, the method comprising the step of: directing a beam of laser light at the substrate such that the beam of laser light is focused within the substrate between the first and second surfaces thereof and the beam of laser light forms a thermally weakened zone (TWZ) in the substrate, the TWZ extending between the first and second device regions and defining a break line. Claim: 2. The method of claim 1 further comprising breaking the substrate along the break line to form first and second dice, the first die including the first device region of the substrate and the second die including the second device region of the substrate. Claim: 3. The method of claim 1 wherein the TWZ has a depth into a connecting portion of the substrate between the first and second device portions of at least 50% of a thickness of the connecting portion. Claim: 4. The method of claim 3 wherein the depth of the TWZ into the connecting portion is at least 95% of the thickness of the connecting portion. Claim: 5. The method of claim 1 wherein the step of directing the beam of laser light is conducted such that the beam of laser light causes substantially no surface ablation of the substrate. Claim: 6. The method of claim 1 wherein the step of directing the beam of laser light is conducted such that the beam of laser light forms a fully ablated ablation trench in at least one of the first and second surfaces of the substrate extending along the break line. Claim: 7. The method of claim 6 wherein the ratio of the combined depth of the ablation trench and the TWZ into the substrate to the greater of the maximum width of the TWZ and the maximum width of the ablation trench is at least 1:1. Claim: 8. The method of claim 6 wherein the step of directing the beam of laser light is conducted such that the ablation trench has a depth into the substrate of no more than about 50% of the thickness of a connecting portion of the substrate between the first and second device regions. Claim: 9. The method of claim 6 wherein the step of directing the beam of laser light is conducted such that the ablation trench has a depth into the substrate of no more than 50 μm. Claim: 10. The method of claim 9 wherein the step of directing the beam of laser light is conducted such that the ablation trench has a width perpendicular to the break line of no more than 30 μm. Claim: 11. The method of claim 1 wherein the step of directing the beam of laser light is conducted such that the TWZ has a TWZ depth into the substrate and a TWZ maximum width across the substrate, and the ratio of the TWZ depth to the TWZ maximum width is at least 1:1. Claim: 12. The method of claim 1 including forming at least one device layer on the first surface of the substrate, the at least one device layer including first and second device portions disposed on the first and second device regions, respectively. Claim: 13. The method of claim 12 wherein the step of forming the at least one device layer precedes the step of directing the beam of laser light. Claim: 14. The method of claim 12 further comprising breaking the substrate along the break line to form first and second dice, the first die including the first device region of the substrate and the first device portion, and the second die including the second device region of the substrate and the second device portion. Claim: 15. The method of claim 14 wherein the first and second dice include first and second light emitting diodes (LEDs), respectively. Claim: 16. The method of claim 14 wherein the first and second dice include first and second laser diodes, respectively. Claim: 17. The method of claim 12 further comprising forming an isolation trench in the at least one device layer, the isolation trench defining a first mesa including the first device portion and a second mesa including the second device portion. Claim: 18. The method of claim 17 wherein the step of directing the beam of laser light includes directing the beam of laser light into the substrate through the isolation trench. Claim: 19. The method of claim 17 wherein the step of forming the isolation trench includes etching the at least one device layer. Claim: 20. The method of claim 12 further comprising forming first and second contacts on the first and second device portions, respectively. Claim: 21. The method of claim 20 further comprising forming first and second eutectic metal contacts on each of the first and second contacts, respectively. Claim: 22. The method of claim 20 further comprising forming third and fourth contacts on the first side of the substrate opposite the first and second contacts, respectively. Claim: 23. The method of claim 12 wherein the at least one device layer includes a Group III nitride. Claim: 24. The method of claim 1 including forming a shaping trench in the second side of the substrate. Claim: 25. The method of claim 24 wherein the step of directing the beam of laser light includes directing the beam of laser light into the substrate through the shaping trench. Claim: 26. The method of claim 24 wherein the step of forming the shaping trench includes sawing the shaping trench into the second side of the substrate. Claim: 27. The method of claim 26 wherein the step of sawing the shaping trench includes forming the shaping trench such that the shaping trench is in the shape of a truncated pyramid with a cubic portion on top. Claim: 28. The method of claim 24 wherein the shaping trench has a depth in the substrate of at least about 25 μm. Claim: 29. The method of claim 28 wherein the shaping trench has a depth in the substrate of between about 200 and 225 μm. Claim: 30. The method of claim 24 wherein the step of forming the shaping trench includes forming the shaping trench such that the shaping trench is substantially parallel to the break line. Claim: 31. The method of claim 30 wherein the step of forming the shaping trench includes forming the shaping trench such that the shaping trench is substantially aligned with the break line. Claim: 32. The method of claim 1 wherein the substrate is formed of SiC. Claim: 33. A semiconductor substrate assembly comprising: a) a semiconductor substrate having first and second opposed surfaces and including first and second device regions and a connecting portion extending between and joining the first and second device regions; and b) a thermally weakened zone (TWZ) within the connecting portion and between the first and second surfaces, the TWZ extending between the first and second device regions and defining a break line; c) wherein the first and second device regions are separable to form first and second dice by breaking the substrate along the break line; and d) wherein the TWZ has a depth into the connecting portion of at least 50% of a thickness of the connecting portion. Claim: 34. The assembly of claim 33 wherein the depth of the TWZ into the connecting portion is at least 95% of the thickness of the connecting portion. Claim: 35. The assembly of claim 33 wherein each of the first and second surfaces of the substrate is substantially non-surface ablated. Claim: 36. The assembly of claim 33 including a fully ablated ablation trench defined in a surface of the substrate and extending along the break line. Claim: 37. The assembly of claim 36 wherein the ablation trench has a depth into the connecting portion of no more than 50% of the thickness of the connecting portion. Claim: 38. The assembly of claim 36 wherein the ablation trench has a depth into the substrate of no more than 50 μm. Claim: 39. The assembly of claim 36 wherein the ablation trench has a width perpendicular to the break line of no more than 30 μm. Claim: 40. The assembly of claim 33 including at least one device layer on the first surface of the substrate, the at least one device layer including first and second device portions disposed on the first and second device regions, respectively. Claim: 41. The assembly of claim 40 configured such that, when the assembly is separated along the break line to form the first and second dice, the first die includes the first device region of the substrate and the first device portion, and the second die includes the second device region of the substrate and the second device portion. Claim: 42. The assembly of claim 41 configured such that, when the assembly is separated along the break line to form the first and second dice, the first and second dice include first and second light emitting diodes (LEDs), respectively. Claim: 43. The assembly of claim 41 configured such that, when the assembly is separated along the break line to form the first and second dice, the first and second dice include first and second laser diodes, respectively. Claim: 44. The assembly of claim 40 including an isolation trench in the at least one device layer, the isolation trench defining a first mesa including the first device portion and a second mesa including the second device portion. Claim: 45. The assembly of claim 33 including first and second contacts on the first and second device portions, respectively. Claim: 46. The assembly of claim 45 including first and second eutectic metal contacts on each of the first and second contacts, respectively. Claim: 47. The assembly of claim 45 including third and fourth contacts on the first side of the substrate opposite the first and second contacts, respectively. Claim: 48. The assembly of claim 33 wherein the at least one device layer includes a Group III nitride. Claim: 49. The assembly of claim 33 including a shaping trench in the second side of the substrate. Claim: 50. The assembly of claim 49 wherein the shaping trench is in the shape of a truncated pyramid with a cubic portion on top. Claim: 51. The assembly of claim 49 wherein the shaping trench has a depth in the substrate of at least about 25 μm. Claim: 52. The assembly of claim 51 wherein the shaping trench has a depth in the substrate of between about 200 and 225 μm. Claim: 53. The assembly of claim 49 wherein the shaping trench is substantially parallel to the break line. Claim: 54. The assembly of claim 53 wherein the shaping trench is substantially aligned with the break line. Claim: 55. The assembly of claim 33 wherein the substrate is formed of SiC. Claim: 56. A semiconductor substrate assembly comprising: a) a semiconductor substrate having first and second opposed surfaces and including first and second device regions; and b) a thermally weakened zone (TWZ) within the substrate between the first and second surfaces, the TWZ extending between the first and second device regions and defining a break line; c) a fully ablated ablation trench defined in a surface of the substrate and extending along the break line; d) wherein the ratio of the combined depth of the ablation trench and the TWZ into the substrate to the greater of the maximum width of the TWZ and the maximum width of the ablation trench is at least 1:1; and e) wherein the first and second device regions are separable to form first and second dice by breaking the substrate along the break line. Claim: 57. The assembly of claim 56 wherein the substrate is formed of SiC. Claim: 58. A semiconductor substrate assembly comprising: a) a semiconductor substrate having first and second opposed surfaces and including first and second device regions; and b) a thermally weakened zone (TWZ) within the substrate between the first and second surfaces, the TWZ extending between the first and second device regions and defining a break line; c) wherein the TWZ has a TWZ depth into the substrate and a TWZ maximum width across the substrate, and the ratio of the TWZ depth to the TWZ maximum width is at least 1:1; and d) wherein the first and second device regions are separable to form first and second dice by breaking the substrate along the break line. Claim: 59. The assembly of claim 58 wherein the substrate is formed of SiC. Current U.S. Class: 438458/000

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