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ELECTROSTATIC DISCHARGE CIRCUIT FOR RADIO FREQUENCY TRANSMITTERS

LIN, Chun-Yu ; CHU, Li-Wei ; et al.
2012
Online Patent

Titel:
ELECTROSTATIC DISCHARGE CIRCUIT FOR RADIO FREQUENCY TRANSMITTERS
Autor/in / Beteiligte Person: LIN, Chun-Yu ; CHU, Li-Wei ; KER, Ming-Dou ; TSAI, Ming-Hsien ; HUNG, Ping-Fang ; SONG, Ming-Hsiang
Link:
Veröffentlichung: 2012
Medientyp: Patent
Sonstiges:
  • Nachgewiesen in: USPTO Patent Applications
  • Sprachen: English
  • Document Number: 20120170161
  • Publication Date: July 5, 2012
  • Appl. No: 12/982004
  • Application Filed: December 30, 2010
  • Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. (Hsin-Chu, TW)
  • Claim: 1. A radio frequency (RF) transmitter comprising: a power amplifier having an input that receives RF signals and an output that transmits the amplified RF signals to an antenna; and an electrostatic discharge (ESD) protection circuit that is electrically coupled to the output of the power amplifier, wherein the ESD protection circuit includes a silicon-controlled rectifier (SCR) that is electrically coupled to the output of the power amplifier, an ESD detection circuit that triggers the SCR responsive to detect an electrostatic discharge on an ESD bus, and an ESD clamp circuit that is coupled to the first voltage line.
  • Claim: 2. The RF transmitter of claim 1, wherein the SCR comprises: an alternating arrangement of a first N-type semiconductor material, a first P-type semiconductor material, a second P-type semiconductor material, a second N-type semiconductor material and a third P-type semiconductor material, wherein shallow trench isolations (STIs) are located at the ends of the alternating arrangement and between the first P-type semiconductor material and the second P-type semiconductor material, wherein the output of the power amplifier, the ESD detection circuit, and a second voltage line are electrically coupled to the first P-type semiconductor material, the second P-type semiconductor material, and the second N-type and third P-type semiconductor material, respectively.
  • Claim: 3. The RF transmitter of claim 1, wherein the first P-type and first N-type semiconductor materials are implanted in an N-well and the second P-type, second N-type and third P-type semiconductor materials are implanted in a P-well, wherein both the N-well and the P-well are formed in a P substrate.
  • Claim: 4. The RF transmitter of claim 2, wherein the ESD bus is coupled between the SCR and the ESD detection circuit.
  • Claim: 5. The RF transmitter of claim 4, wherein the ESD bus is electrically coupled between the first N-type semiconductor material of the SCR and the ESD detection circuit.
  • Claim: 6. The RF transmitter of claim 4, further comprising at least one ESD component that is electrically coupled between the output of the power amplifier and the ESD bus.
  • Claim: 7. The RF transmitter of claim 2, further comprising at least one ESD component that is electrically coupled between the ESD bus and the first voltage line.
  • Claim: 8. The RF transmitter of claim 7, further comprising at least one ESD component that is electrically coupled between the SCR and a second voltage line, wherein the first voltage line has a higher voltage value than the second voltage line.
  • Claim: 9. The RF transmitter of claim 7, further comprising at least one ESD component that is electrically coupled between the output of the power amplifier and the SCR.
  • Claim: 10. The RF transmitter of claim 1, wherein the ESD detection circuit includes a zener diode and a resister that are coupled in series between the ESD bus and a second voltage line, wherein the ESD bus has a higher voltage value than the second voltage line, wherein the SCR is triggered from a signal at a node between the zener diode and the resister responsive to detect the electrostatic discharge on either the ESD bus or the second voltage line.
  • Claim: 11. An electrostatic discharge (ESD) protection circuit comprising: a silicon-controlled rectifier (SCR) that is electrically coupled to the output of a power amplifier; an ESD detection circuit that triggers the SCR responsive to detect an electrostatic discharge on an ESD bus; and an ESD clamp circuit that is coupled to the first voltage line.
  • Claim: 12. The ESD protection circuit of claim 11, wherein the SCR comprises: an alternating arrangement of a first N-type semiconductor material, a first P-type semiconductor material, a second P-type semiconductor material, a second N-type semiconductor material and a third P-type semiconductor material, wherein shallow trench isolations (STIs) are located at the ends of the alternating arrangement and between the first P-type semiconductor material and the second P-type semiconductor material, wherein the output of the power amplifier, the ESD detection circuit, and a second voltage line are electrically coupled to the first P-type semiconductor material, the second P-type semiconductor material, and the second N-type and third P-type semiconductor material, respectively.
  • Claim: 13. The ESD protection circuit of claim 11, wherein the first P-type and second P-type semiconductor materials are implanted in an N-well and the second P-type, second N-type and third P-type semiconductor materials are implanted in a P-well, wherein both the N-well and the P-well are formed in a P substrate.
  • Claim: 14. The ESD protection circuit of claim 12, wherein the ESD bus is coupled between the SCR and the ESD detection circuit.
  • Claim: 15. The ESD protection circuit of claim 14, further comprising at least one ESD component that is electrically coupled between the output of the power amplifier and the second voltage line.
  • Claim: 16. The ESD protection circuit of claim 12, further comprising at least one ESD component that is electrically coupled between the output of the ESD bus and the first voltage line.
  • Claim: 17. The ESD protection circuit of claim 16, further comprising at least one ESD component that is electrically coupled between the SCR and a second voltage line, wherein the first voltage line has a higher voltage value than the second voltage line.
  • Claim: 18. The ESD protection circuit of claim 16, further comprising at least one ESD component that is electrically coupled between the output of the power amplifier and the SCR.
  • Claim: 19. The ESD protection circuit of claim 11, wherein the ESD detection circuit includes a zener diode and a resister that are coupled in series between the ESD bus and a second voltage line, wherein the SCR is triggered from a signal at a node between the zener diode and the resister responsive to detect the electrostatic discharge on either the ESD bus or the second voltage line.
  • Claim: 20. An electronic device comprising: a power amplifier having an input that receives and amplifies RF signals and an output that transmits the amplified RF signals; and an electrostatic discharge (ESD) protection circuit that is electrically coupled to the output of the power amplifier, wherein the ESD protection circuit includes: a silicon-controlled rectifier (SCR) that is electrically coupled to the output of the power amplifier, an ESD detection circuit that triggers the SCR responsive to detect an electrostatic discharge on an ESD bus, and an ESD clamp circuit that is coupled to the first voltage line, and an antenna for transmitting the RF signals from the power amplifier.
  • Claim: 21. The electronic device of claim 20, wherein the SCR comprises: an alternating arrangement of a first N-type semiconductor material, a first P-type semiconductor material, a second P-type semiconductor material, a second N-type semiconductor material and a third P-type semiconductor material, wherein shallow trench isolations (STIs) are located at the ends of the alternating arrangement and between the first P-type semiconductor material and the second P-type semiconductor material, wherein the output of the power amplifier, the ESD detection circuit, and a second voltage line are electrically coupled to the first P-type semiconductor material, the second P-type semiconductor material, and the second N-type and third P-type semiconductor material, respectively.
  • Claim: 22. The electronic device of claim 20, wherein the first P-type and first N-type semiconductor materials are implanted in an N-well and the second P-type, second N-type and third P-type semiconductor materials are implanted in a P-well, wherein both the N-well and the P-well are formed in a P substrate.
  • Claim: 23. The electronic device of claim 21, wherein the ESD bus is coupled between the SCR and the ESD detection circuit.
  • Current U.S. Class: 361/56
  • Current International Class: 02

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