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MESSAGE BASED MULTI-PROCESSOR SYSTEM AND METHOD OF OPERATING THE SAME

2023
Online Patent

Titel:
MESSAGE BASED MULTI-PROCESSOR SYSTEM AND METHOD OF OPERATING THE SAME
Link:
Veröffentlichung: 2023
Medientyp: Patent
Sonstiges:
  • Nachgewiesen in: USPTO Patent Applications
  • Sprachen: English
  • Document Number: 20230266974
  • Publication Date: August 24, 2023
  • Appl. No: 18/017538
  • Application Filed: July 23, 2021
  • Claim: 1. A message based multi-processor system comprising: a message exchange network; and a plurality of processor clusters capable to mutually exchange messages via the message exchange network, wherein each processor cluster comprises: one or more processor cluster elements, and a message generator; wherein the message based multiprocessor system is configurable as a neural network processor system having a plurality of neural network processing layers, where each neural network processing layer is assigned one or more processor clusters of the plurality of processor clusters with associated processor cluster elements of the processor clusters being neural network processing elements; wherein the message generator of a processor cluster associated with a neural network processing layer comprises: a logic module, and an associated message generator control storage space comprising respective message generation control data for respective destination processor clusters in a set of destination processor clusters, wherein the logic module of the message generator is configured to perform, in response to an activation signal of a processor cluster element, a respective computation using the message generation control data for each destination processor cluster in the set of destination processor clusters to: determine whether the respective destination processor cluster is a target of the processor cluster element, and selectively generate and transmit a message to each destination processor cluster that was determined as a target by the respective computation.
  • Claim: 2. The message based multi-processor system according to claim 1, wherein the logic module comprises a respective logic module section to compute, for the coordinate values of the processor cluster element associated with the activation signal, a potential destination range having minimum and maximum coordinate values for respective coordinates in a coordinate system of the destination processor cluster, wherein the logic module comprises a further logic module section configured to: determine whether a condition is complied with that, for each of the coordinates, at least one of the computed minimum value and the computed maximum value is within the corresponding range for that coordinate, and enable a message transmission if the condition is complied with and disable a message transmission if for any of the coordinates neither the computed minimum value nor the computed maximum value are within the corresponding range.
  • Claim: 3. The message based multi-processor system according to claim 2, wherein the further logic module section comprises, for each coordinate: a respective first comparator module configured to provide a signal indicative that the computed minimum value for that coordinate is in the corresponding range; a respective second comparator module configured to provide a first match signal indicative that the computed maximum value for that coordinate is in the corresponding range; and a logic OR gate to provide an second match signal indicative that at least one first match signal is valid, the further logic module section further comprising a logic AND gate to provide a message transmission enable signal if the further match signal for each coordinate is valid.
  • Claim: 4. The message based multi-processor system according to claim 3, wherein a comparator module comprises: at least one mask register having respective mask bits, each mask bit being representative for a respective power of 2 and respective logic gates for bitwise comparison with a corresponding bit of a computed minimum value or maximum value, and a combination module configured to issue an invalid match signal indicating that at least one of the logic gates indicates a bit of a computed minimum/maxim value is set while a corresponding mask bit is not set.
  • Claim: 5. The message based multi-processor system according to claim 1, wherein the control data furthermore comprises predetermined data indicative of an offset (Xoffs, Yoffs) that is computed in a preparatory step as follows: Xoffs=Xsrc0−Xdst0−ΔXmin, Yoffs=Ysrc0−Ydst0−ΔYmin, wherein (Xsrc0,Ysrc0) is a pair of coordinates representative for a first position of the processor cluster that is the source of the message in its associated neural network processing layer, wherein (Xdst0,Ydst0) is a pair of coordinates representative for a first position of the processor cluster that is specified by the control data as the destination of the message in its associated neural network processing layer, and wherein the values −ΔXmin, −ΔYmin are related to a convolution kernel size Wx, Wy.
  • Claim: 6. The message based multi-processor system according to claim 1, wherein the control data furthermore comprises an indicator that the processor cluster elements of the destination processor cluster are arranged in one dimension and have a coordinate value for the one dimension that is proportional to an index of the processor cluster elements in the destination processor cluster.
  • Claim: 7. The message based multi-processor system according to claim 1, wherein the control data furthermore comprises an indicator specifying stride changes.
  • Claim: 8. The message based multi-processor system according to claim 1, wherein the control data furthermore comprises an indicator specifying a scale factor.
  • Claim: 9. The message based multi-processor system according to claim 1, wherein a destination processor cluster further comprises a pattern storage facility, wherein respective entries of the pattern storage facility specify a spatial pattern of processor cluster elements in a space of the neural network processing layer associated with the destination processor cluster, and wherein the control data furthermore comprises a reference to an entry in the pattern storage facility.
  • Claim: 10. A method of operating a message based multi-processor system, wherein the system comprises: a message exchange network; and a plurality of processor clusters capable to mutually exchange messages via the message exchange network, wherein each processor cluster comprises one or more processor cluster elements, and a message generator including a logic module and a message generator control storage space; and wherein the method comprises: configuring, in a preparatory phase, the message based multiprocessor system as a neural network processor having a plurality of neural network processing layers, by assigning to each neural network processing layer a respective subset of one or more of the processor clusters including associated processor cluster elements, wherein the associated processor cluster elements form neural network processing elements therein; writing, in the preparatory phase, in respective storage entries of the message generator control storage space of a source processor cluster, respective sets of control data for respective destination processor clusters in a subsequent neural network processing layer; activating, during an operational phase, in a source processor cluster element of the source processor cluster, the message generator; performing, by the message generator in response to the activating, the following for each set of control data of the source processor cluster: a) retrieving the each set of control data from the respective storage entry; b) performing a respective computation using the message generation control data for each destination processor cluster in the set of destination processor clusters to determine whether or not the respective destination processor cluster is a target of the processor cluster element; and c) transmitting, in accordance with the result of the determination being affirmative, an output message to the designated processor cluster.
  • Claim: 11. The method of operating a message based multi-processor system according to claim 10, wherein the control data further comprises an indication of a message distribution pattern, wherein the transmitted output message conveys the indication, and wherein the destination processor cluster receiving the message applies the message to a set of core elements of the destination processor cluster in accordance with a pattern specified by the indication.
  • Current International Class: 06; 06

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