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DEVICE STRUCTURE FOR HIGH FILL-FACTOR SPAD PIXEL WITH CMOS IN-PIXEL CIRCUITS

2024
Online Patent

Titel:
DEVICE STRUCTURE FOR HIGH FILL-FACTOR SPAD PIXEL WITH CMOS IN-PIXEL CIRCUITS
Link:
Veröffentlichung: 2024
Medientyp: Patent
Sonstiges:
  • Nachgewiesen in: USPTO Patent Applications
  • Sprachen: English
  • Document Number: 20240153983
  • Publication Date: May 9, 2024
  • Appl. No: 18/096012
  • Application Filed: January 11, 2023
  • Claim: 1. A pixel cell for a CMOS image sensor, comprising: a semiconductor substrate having a first side and a second side that is opposite the first side; a first pixel region that includes at least one first photodiode, the first photodiode comprising a first region formed from a first type semiconductor on the first side of the semiconductor substrate and a second region formed from a second type semiconductor on the first side of the semiconductor substrate; a pixel transistor region including at least one transistor; and an isolation structure that isolates the pixel transistor region from the first photodiode, the isolation structure on the first side of the semiconductor substrate comprising a first shallow trench isolation (STI) structure that is proximate to the second region of the first photodiode, a third region formed from the first type semiconductor that is proximate to the first STI structure, a second STI structure that is proximate to the third region and that is proximate to the pixel transistor region, and an implant region formed from the first type semiconductor that is in contact with the third region and extends toward the second side of the semiconductor substrate.
  • Claim: 2. The pixel cell of claim 1, further comprising a trench isolation structure extending from the second side toward the first side of the semiconductor substrate to contact the implant region.
  • Claim: 3. The pixel cell of claim 1, wherein the first photodiode comprises an avalanche diode or a single photon avalanche diode (SPAD).
  • Claim: 4. The pixel cell of claim 1, wherein the first type semiconductor comprises a p-type semiconductor, and the second type semiconductor comprises an n-type semiconductor.
  • Claim: 5. The pixel cell of claim 1, wherein the first region comprises an anode and the second region comprises a cathode that is shared with a second photodiode of the first pixel region.
  • Claim: 6. The pixel cell of claim 1, wherein the second region forms a ring around the first region, and the first pixel region further comprises a fourth region that is between the first region and the second side of the semiconductor substrate and is formed from the second type semiconductor, the fourth region contacting the ring formed by the second region.
  • Claim: 7. The pixel cell of claim 6, wherein the fourth region contacts the ring formed by the second region to enclose the first region.
  • Claim: 8. The pixel cell of claim 6, wherein the second region and the fourth region are shared with a second photodiode of the first pixel region.
  • Claim: 9. The pixel cell of claim 1, further comprising a second pixel region that includes at least one second photodiode, the second photodiode of the second pixel region comprising a fourth region formed from the first type semiconductor on the first side of the semiconductor substrate and a fifth region formed from the second type semiconductor formed on the first side of the semiconductor substrate, wherein the pixel transistor region is disposed between the first pixel region and the second pixel region, and the isolation structure further isolates the pixel transistor region from the second photodiode.
  • Claim: 10. A pixel cell for a CMOS image sensor, comprising: a semiconductor substrate having a first side and a second side that is opposite the first side; a first pixel region that includes at least one first photodiode, the first photodiode comprising a first region formed from a first type semiconductor on the first side of the semiconductor substrate and a second region formed from a second type semiconductor on the first side of the semiconductor substrate; a second pixel region that includes at least one second photodiode, the second photodiode comprising a third region formed from the first type semiconductor on the first side of the semiconductor substrate and a fourth region formed from the second type semiconductor on the first side of the semiconductor substrate; a pixel transistor region disposed between the first pixel region and the second pixel region, the pixel transistor region including at least one transistor; and an isolation structure that encloses and isolates the pixel transistor region from the first photodiode and the second photodiode, the isolation structure on the first side of the semiconductor substrate comprising a first shallow trench isolation (STI) structure, a second STI structure, a fifth region between the first STI structure and the second STI structure that is formed from the first type semiconductor, and an implant region formed from the first type semiconductor that is in contact with the fifth region and extends toward the second side of the semiconductor substrate.
  • Claim: 11. The pixel cell of claim 10, further comprising a trench isolation structure extending from the second side toward the first side of the semiconductor substrate to contact the implant region.
  • Claim: 12. The pixel cell of claim 10, wherein the first photodiode comprises an avalanche diode or a single photon avalanche diode (SPAD).
  • Claim: 13. The pixel cell of claim 10, wherein the first type semiconductor comprises a p-type semiconductor, and the second type semiconductor comprises an n-type semiconductor.
  • Claim: 14. The pixel cell of claim 10, wherein the first region comprises an anode and the second region comprises a cathode that is shared with another first photodiode of the first pixel region, and wherein the third region comprises an anode and the fourth region comprises a cathode that is shared with another second photodiode of the second pixel region.
  • Claim: 15. The pixel cell of claim 10, wherein the second region forms a first ring around the first region and the fourth region forms a second ring around the third region, the first pixel region further comprising: a sixth region that is between the first region and the second side of the semiconductor substrate and is formed from the second type semiconductor, the sixth region contacting the first ring formed by the second region; and a seventh region that is between the third region and the second side of the semiconductor substrate and is formed from the second type semiconductor, the seventh region contacting the second ring formed by the fourth region.
  • Claim: 16. The pixel cell of claim 15, wherein the second region and the sixth region are shared with another first photodiode of the first pixel region.
  • Claim: 17. A pixel cell for a CMOS image sensor, comprising: a semiconductor substrate having a first side and a second side that is opposite the first side; a first pixel region that includes at least one first photodiode; a pixel transistor region disposed between the first pixel region, the pixel transistor region including at least one transistor; and an isolation structure that encloses the first pixel region and isolates the pixel transistor region from the first pixel region, the isolation structure on the first side of the semiconductor substrate comprising a first shallow trench isolation (STI) structure, a second STI structure and a first region between the first STI structure and the second STI structure that is formed from a first type semiconductor, and an implant region formed from the first type semiconductor that is in contact with the first region and extends toward the second side of the semiconductor substrate.
  • Claim: 18. The pixel cell of claim 17, further comprising a trench isolation structure extending from the second side toward the first side of the semiconductor substrate to contact the implant region.
  • Claim: 19. The pixel cell of claim 17, wherein the first photodiode comprises a single photon avalanche diode (SPAD), and wherein the first type semiconductor comprises a p-type semiconductor.
  • Claim: 20. The pixel cell of claim 17, wherein the at least one transistor is part of a CMOS transistor circuit.
  • Current International Class: 01

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