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Process for forming multi-layer electronic structures including a cap for providing a flat surface for DCA and solder ball attach and for sealing plated through holes

Kamperman, James Steven ; Gall, Thomas Patrick ; et al.
2000
Online Patent

Titel:
Process for forming multi-layer electronic structures including a cap for providing a flat surface for DCA and solder ball attach and for sealing plated through holes
Autor/in / Beteiligte Person: Kamperman, James Steven ; Gall, Thomas Patrick ; Stone, David Brian
Link:
Veröffentlichung: 2000
Medientyp: Patent
Sonstiges:
  • Nachgewiesen in: USPTO Patent Grants
  • Sprachen: English
  • Patent Number: 6,098,280
  • Publication Date: August 08, 2000
  • Appl. No: 09/003,034
  • Application Filed: January 05, 1998
  • Assignees: International Business Machines Corporation (Armonk, NY)
  • Claim: What is claimed is
  • Claim: 1. A process of forming a multi-layer electronic composite structure, said process comprising the steps of
  • Claim: a) providing at least one core including at least one plane of at least one electrically conducting material with a plane of at least one electrically insulating material on both sides of the at least one plane of at least one electrically conducting material, said at least one core including a plurality of plated through holes formed therethrough plated with an electrically conducting material; and
  • Claim: b) providing a plurality of pads of an electrically-conducting material over a plurality of said plated through holes, each of said pads providing a flat surface for attaching an electronic device, each of said pads also preventing solder from entering said plurality of plated through holes and providing a direct electrical connection between said electronic device and said at least one core, said pads being physically isolated from each other
  • Claim: wherein said pads are formed by
  • Claim: a) forming a panel by providing a plane of an electrically conducting material including a top surface and a bottom surface;
  • Claim: b) depositing a first layer of photosensitive material on said top and bottom surfaces of said electrically conducting plane;
  • Claim: c) exposing said first layer of photosensitive material on said bottom surface of said electrically conducting plane to radiation, said radiation causing photochemical reactions to occur within said first layer of photosensitive material, said bottom surface being exposed in a pattern matching a pattern of plated through holes formed in said at least one core;
  • Claim: d) exposing all of said first layer of photosensitive material to radiation on said top surface of said electrically conducting plane;
  • Claim: e) removing portions of said first layer of photosensitive material not exposed to said radiation;
  • Claim: f) depositing an electrically conducting material on portions of said electrically conducting material exposed by removing portions of said first layer of photosensitive material not exposed to said radiation;
  • Claim: g) removing all remaining portions of said first layer of photosensitive material from said electrically conducting plane;
  • Claim: h) aligning said electrically conducting material deposited on said electrically conducting plane with said plated through holes on said core;
  • Claim: i) joining said plane to said at least one core by laminating said bottom surface of said plane to said core;
  • Claim: j) depositing a second layer of photosensitive material on said top surface of said plane;
  • Claim: k) exposing selected portions of said second layer of photosensitive material on said top surface of said panel to radiation, said radiation causing photochemical reactions to occur within said second layer of photosensitive material;
  • Claim: l) developing said second layer of photosensitive material to remove portions of said second layer of photosensitive material;
  • Claim: m) depositing an electrically conducting material where the portions of the second layer of photosensitive material were removed;
  • Claim: n) removing the remaining portions of the second layer of photosensitive material; and
  • Claim: o) etching said electrically conducting plane of said panel.
  • Claim: 2. A process of forming a multi-layer electronic composite according to claim 1, further comprising the step of cleaning said top surface of said panel after said panel is joined to said at least one core.
  • Claim: 3. A process of forming a multi-layer electronic composite according to claim 1, further comprising the steps of
  • Claim: a) reflowing said electrically conducting material deposited in step (m) of the steps of forming the pads of claim 1; and
  • Claim: b) mechanically flattening said electrically conducting material subject to said reflowing.
  • Claim: 4. A process of forming a multi-layer electronic composite according to claim 1, further comprising the step of cleaning the portions of said electrically conductive plane exposed by removing said portions of said photosensitive material in step (e) of the steps of forming the pads of claim 1.
  • Claim: 5. A process of forming a multi-layer electronic composite according to claim 1, wherein said electronic device includes at least one ground, signal, and power site directly attached to at least one of said pads.
  • Claim: 6. A process of forming a multi-layer electronic composite according to claim 1, wherein said electronic device is directly attached to at least one of said pads using a solder ball.
  • Claim: 7. A process of forming a multi-layer electronic composite according to claim 1, wherein said electronic device is directly attached to at least one of said pads.
  • Claim: 8. A process of forming a multi-layer electronic composite structure, said process comprising the steps of
  • Claim: b) depositing a first layer of photosensitive material on said top and bottom surfaces of said plane of electrically conducting material;
  • Claim: i) joining said panel to said at least one core by laminating said bottom surface of said panel to said core;
  • Claim: j) depositing a second layer of photosensitive material on said top surface of said panel;
  • Claim: l) developing said second layer of photosensitive material to remove portions of said second layer of photosensitive material, thereby exposing portions of said plane of electrically conducting material;
  • Claim: m) etching away said exposed portions of said electrically conducting material using said second layer of photosensitive material not removed as a mask; and
  • Claim: n) removing the remaining portions of the second layer of photosensitive material.
  • Claim: 9. A process of forming a multi-layer electronic composite according to claim 8, further comprising the step of cleaning said top surface of said panel after said panel is joined to said at least one core.
  • Claim: 10. A process of forming a multi-layer electronic composite according to claim 8, further comprising the step of cleaning the portions of said electrically conductive plane exposed by removing said portions of said photosensitive material in step (e) of the steps of forming the pads of claim 8.
  • Claim: 11. A process of forming a multi-layer electronic composite according to claim 8, wherein said electronic device includes at least one ground, signal, and power site directly attached to at least one of said pads.
  • Claim: 12. A process of forming a multi-layer electronic composite according to claim 8, wherein said electronic device is directly attached to at least one of said pads using a solder ball.
  • Claim: 13. A process of forming a multi-layer electronic composite according to claim 8, wherein said electronic device is directly attached to at least one of said pads.
  • Claim: 14. A process of forming a multi-layer electronic composite structure, said process comprising the steps of
  • Claim: b) providing a pad of an electrically-conducting material over at least one of said plated through holes, said pad providing a flat surface for attaching an electronic device, each of said pad also preventing solder from entering said at least one plated through hole and providing an electrical connection between said electronic device and said at least one core, wherein said pad is formed by
  • Claim: i) forming a panel by providing a plane of an electrically conducting material including a top surface and a bottom surface;
  • Claim: ii) depositing a layer of a photosensitive material on said top and bottom surfaces of said plane of at least one electrically conductive plane;
  • Claim: iii) exposing said photosensitive material on said bottom surface of said electrically conducting plane to radiation, said radiation causing photochemical reactions to occur within said photosensitive material, said bottom surface being exposed in a pattern matching a pattern of plated through holes formed in said at least one core;
  • Claim: iv) exposing all of said photosensitive material to radiation on said top surface of said electrically conducting plane;
  • Claim: v) removing portions of said photosensitive material not exposed to said radiation;
  • Claim: vi) depositing an electrically conducting material on portions of said electrically conducting material exposed by removing portions of said photosensitive material not exposed to said radiation;
  • Claim: vii) removing all remaining portions of said photosensitive material from said electrically conducting plane;
  • Claim: viii) aligning said electrically conducting material deposited on said electrically conducting plane with said plated through holes on said core;
  • Claim: ix) joining said panel to said at least one core by laminating said bottom surface of said plane to said core;
  • Claim: x) cleaning said top surface of said panel after said panel is joined to said at least one core;
  • Claim: xi) depositing a layer of a photosensitive material on said top surface of said plane;
  • Claim: xii) exposing selected portions of said photosensitive material on said top surface of said panel to radiation, said radiation causing photochemical reactions to occur within said photosensitive material;
  • Claim: xiii) developing said photosensitive material to remove portions of said photosensitive material;
  • Claim: xiv) depositing an electrically conducting material where the portions of the photosensitive material were removed;
  • Claim: xv) removing the remaining portions of the photosensitive material; and
  • Claim: xvi) etching said electrically conducting plane of said panel.
  • Claim: 15. A process of forming a multi-layer electronic composite structure, said process comprising the steps of
  • Claim: a) providing at least one core including at least one plane of at least one electrically conducting material with a plane of at least one electrically insulating material on both sides of the at least one plane of at least one electrically conducting material, said at least one core including a plurality of plated through holes formed therethrough plated with an electrically conducting material;
  • Claim: b) providing a pad of an electrically-conducting material over each of said plated through holes, said pad providing a flat surface for attaching an electronic device, each of said pad also preventing solder from entering said at least one plated through hole and providing an electrical connection between said electronic device and said at least one core;
  • Claim: c) forming a panel by providing a plane of an electrically conducting material including a top surface and a bottom surface;
  • Claim: d) depositing a layer of a photosensitive material on said top and bottom surfaces of said plane of at least one electrically conductive plane;
  • Claim: e) exposing said photosensitive material on said bottom surface of said electrically conducting plane to radiation, said radiation causing photochemical reactions to occur within said photosensitive material, said bottom surface being exposed in a pattern matching a pattern of plated through holes formed in said at least one core;
  • Claim: f) exposing all of said photosensitive material to radiation on said top surface of said electrically conducting plane;
  • Claim: g) removing portions of said photosensitive material not exposed to said radiation;
  • Claim: h) depositing an electrically conducting material on portions of said electrically conducting material exposed by removing portions of said photosensitive material not exposed to said radiation;
  • Claim: i) removing all remaining portions of said photosensitive material from said electrically conducting plane;
  • Claim: j) aligning said electrically conducting material deposited on said electrically conducting plane with said plated through holes on said core;
  • Claim: k) joining said panel to said at least one core by laminating said bottom surface of said panel to said core;
  • Claim: l) depositing a layer of a photosensitive material on said top surface of said panel;
  • Claim: m) exposing selected portions of said photosensitive material on said top surface of said panel to radiation, said radiation causing photochemical reactions to occur within said photosensitive material;
  • Claim: n) developing said photosensitive material to remove portions of said photosensitive material, thereby exposing portions of said plane of electrically conducting material;
  • Claim: o) etching away said exposed portions of said electrically conducting material using said photosensitive material not removed as a mask; and
  • Claim: p) removing the remaining portions of the photosensitive material.
  • Claim: 16. A process of forming a multi-layer electronic composite according to claim 15, further comprising the step of cleaning said top surface of said panel after said panel is joined to said at least one core.
  • Claim: 17. A process of forming a multi-layer structure according to claim 15, further comprising the step of
  • Claim: providing a pad over each of said plated through holes of said core.
  • Claim: 18. A process according to claim 15, further comprising the step of
  • Claim: providing one of said pads over each of said plated through holes of said core.
  • Current U.S. Class: 29/840; 174/262; 361/777; 29/830; 29/832
  • Current International Class: H05K 330
  • Patent References Cited: 3509270 April 1970 Dube et al. ; 3932932 January 1976 Goodman ; 4268585 May 1981 Daur et al. ; 4338149 July 1982 Quaschner ; 4628409 December 1986 Thompson et al. ; 4715116 December 1987 Thorpe et al. ; 4755911 July 1988 Suzuki ; 4788766 December 1988 Burger et al. ; 5046238 September 1991 Daigle et al. ; 5065285 November 1991 Nagai et al. ; 5092035 March 1992 McMichen et al. ; 5120678 June 1992 Moore et al. ; 5200580 April 1993 Sienski ; 5243142 September 1993 Ishikawa et al. ; 5356755 October 1994 Matsuda et al. ; 5784780 July 1998 Loo ; 5981880 November 1999 Appelt et al.
  • Primary Examiner: Hughes, S. Thomas
  • Assistant Examiner: Vereene, Kevin G.
  • Attorney, Agent or Firm: Pollock, Vande Sande & Amernick

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