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- Nachgewiesen in: USPTO Patent Grants
- Sprachen: English
- Patent Number: 7,445,964
- Publication Date: November 04, 2008
- Appl. No: 11/610327
- Application Filed: December 13, 2006
- Assignees: Casio Computer Co., Ltd. (Tokyo, JP), CMK Corporation (Tokyo, JP)
- Claim: 1. A semiconductor device manufacturing method comprising: arranging, on a base plate, a plurality of semiconductor structures each including a semiconductor substrate and a plurality of connection pads, such that the semiconductor structures are separated from each other, and arranging at least one insulating sheet member having opening portions at positions corresponding to the semiconductor structures, the at least one insulating sheet member comprising a lower sheet member and an upper sheet member provided on the lower sheet member; heating and pressing the insulating sheet member from an upper side of the insulating sheet member to melt and set the insulating sheet member between the semiconductor structures; forming at least one layer of upper interconnections, each of which has a connection pad portion and is connected to a corresponding one of the connection pads of one of the semiconductor structures so as to arrange the connection pad portion on the insulating sheet member; and cutting the insulating sheet member between the semiconductor structures to obtain a plurality of semiconductor devices, in each of which the connection pad portion of at least one of the upper interconnections is arranged on the insulating sheet member.
- Claim: 2. A semiconductor device manufacturing method according to claim 1 , wherein each said semiconductor structure includes the connection pads, columnar external connection electrodes connected to the connection pads, and a sealing film formed around the external connection electrodes.
- Claim: 3. A semiconductor device manufacturing method according to claim 1 , wherein the insulating sheet member is cut so that each of the semiconductor devices includes a plurality of the semiconductor structures.
- Claim: 4. A semiconductor device manufacturing method according to claim 1 , further comprising removing the base plate before cutting the insulating sheet member.
- Claim: 5. A semiconductor device manufacturing method according to claim 1 , further comprising removing the base plate after cutting the insulating sheet member.
- Claim: 6. A semiconductor device manufacturing method according to claim 1 , further comprising setting a press limit surface for the heating/pressing process.
- Claim: 7. A semiconductor device manufacturing method according to claim 1 , wherein a size of each of the opening portions of the insulating sheet member is larger than a size of one of the semiconductor structures.
- Claim: 8. A semiconductor device manufacturing method according to claim 7 , wherein a thickness of the insulating sheet member arranged on the base plate is larger than a thickness of the semiconductor structure.
- Claim: 9. A semiconductor device manufacturing method according to claim 1 , wherein the insulating sheet member is made of a material prepared by impregnating a fiber with a thermosetting resin.
- Claim: 10. A semiconductor device manufacturing method according to claim 1 , further comprising forming an insulating material between the insulating sheet member and the upper interconnections.
- Claim: 11. A semiconductor device manufacturing method according to claim 10 , wherein the insulating material is a sheet member.
- Claim: 12. A semiconductor device manufacturing method according to claim 1 , further comprising forming a thin film on the base plate, before arranging the semiconductor structures and the insulating sheet member on the base plate, wherein the thin film is removable from the base plate.
- Claim: 13. A semiconductor device manufacturing method according to claim 12 , wherein the thin film is made of a metal.
- Claim: 14. A semiconductor device manufacturing method according to claim 12 , wherein in cutting the insulating sheet member, the thin film is cut together with the insulating sheet member.
- Claim: 15. A semiconductor device manufacturing method according to claim 12 , further comprising temporarily setting the insulating sheet member after the semiconductor structures and the insulating sheet member are arranged on the thin film.
- Claim: 16. A semiconductor device manufacturing method according to claim 15 , further comprising removing the base plate after the temporary setting.
- Claim: 17. A semiconductor device manufacturing method according to claim 12 , further comprising forming another thin film on the thin film after the base plate is removed.
- Claim: 18. A semiconductor device manufacturing method according to claim 17 , wherein the thin film is a metal foil, and said another thin film is a metal foil.
- Claim: 19. A semiconductor device manufacturing method according to claim 17 , wherein said another thin film is made of an insulating material.
- Claim: 20. A semiconductor device manufacturing method according to claim 17 , wherein said another thin film is formed by stacking a plurality of layers made of different materials.
- Claim: 21. A semiconductor device manufacturing method according to claim 17 , wherein in cutting the insulating sheet member, the insulating sheet member, the thin film and said another thin film are cut.
- Claim: 22. A semiconductor device manufacturing method according to claim 1 , in which in cutting the insulating sheet member, the insulating sheet member is cut, and simultaneously, the base plate is cut so that each said semiconductor device includes a portion of the base plate.
- Claim: 23. A semiconductor device manufacturing method according to claim 1 , further comprising forming an upper insulating film that covers a portion except the connection pad portions of the upper interconnections.
- Claim: 24. A semiconductor device manufacturing method according to claim 23 , further comprising forming solder balls on the connection pad portions of the upper interconnections.
- Claim: 25. A semiconductor device manufacturing method according to claim 1 , further comprising forming a through hole in the insulating sheet member, forming a lower interconnection on a lower surface of the insulating sheet member, and forming, in the through hole, a vertical electrical connection portion that connects at least one of the upper interconnections and the lower interconnection.
- Claim: 26. A semiconductor device manufacturing method according to claim 25 , further comprising removing the base plate before the through hole, the lower interconnection, and the vertical electrical connection portion are formed.
- Claim: 27. A semiconductor device manufacturing method comprising: arranging, on a base plate, a plurality of semiconductor structures each including a semiconductor substrate and a plurality of connection pads, such that the semiconductor structures are separated from each other, and arranging at least one insulating sheet member having opening portions at positions corresponding to the semiconductor structures, the at least one insulating sheet member comprising a lower sheet member and an upper sheet member provided on the lower sheet member; heating and pressing the insulating sheet member from an upper side of the insulating sheet member to melt and set the insulating sheet member between the semiconductor structures; forming at least one layer of upper interconnections, each of which has a connection pad portion and is connected to a corresponding one of the connection pads of one of the semiconductor structures so as to arrange the connection pad portion on the insulating sheet member; and cutting the insulating sheet member between the semiconductor structures to obtain a plurality of semiconductor devices, in each of which the connection pad portion of at least one of the upper interconnections is arranged on the insulating sheet member; wherein the method further comprises forming an upper insulating film made of thermosetting resin on the base plate, wherein the semiconductor structures are arranged on the upper insulating film such that respective surfaces of the semiconductor structures where the connection pads are formed oppose the upper insulating film.
- Claim: 28. A semiconductor device manufacturing method according to claim 27 , wherein each said semiconductor structure includes the connection pads, columnar external connection electrodes connected to the connection pads, and a sealing film formed around the external connection electrodes.
- Claim: 29. A semiconductor device manufacturing method according to claim 27 , wherein the insulating sheet member is arranged on the upper insulating film.
- Current U.S. Class: 438/113
- Patent References Cited: 6467674 October 2002 Mihara ; 6486005 November 2002 Kim ; 6657295 December 2003 Araki ; 6749927 June 2004 Cooray ; 6882054 April 2005 Jobetto ; 2002/0038890 April 2002 Ohuchi ; 2005/0146051 July 2005 Jobetto ; 11-233678 August 1999 ; 2001-326299 November 2001 ; 2001-332643 November 2001 ; 2002-016173 January 2002 ; 2002-084074 March 2002 ; 2002-246755 August 2002 ; 2002-246756 August 2002 ; 2003-231854 August 2002
- Assistant Examiner: Barnes, Seth
- Primary Examiner: Smith, Zandra
- Attorney, Agent or Firm: Frishauf, Holtz, Goodman & Chick, P.C.
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