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- Nachgewiesen in: USPTO Patent Grants
- Sprachen: English
- Patent Number: 7,561,137
- Publication Date: July 14, 2009
- Appl. No: 11/166824
- Application Filed: June 24, 2005
- Assignees: Agere Systems Inc. (Allentown, PA, US)
- Claim: 1. Circuitry comprising a driver for generating a driver output signal presented at a driver output node based on a driver input signal applied at a driver input node, the driver comprising: a first comparator adapted to compare the driver output signal to the driver input signal in order to generate a comparator output signal; a configurable inverter adapted to generate an inverted version of the comparator output signal as an inverter output signal presented at an inverter output node, wherein the configurable inverter is adapted to be selectively configured to provide any one of at least two different inverter logic threshold levels; a first output driving device connected to receive, at its control terminal, a signal based on the inverter output signal, wherein an output node of the first output driving device is connected to the driver output node; and a controller adapted to control the inverter logic threshold level of the configurable inverter to reduce chattering in the driver output signal, wherein the configurable inverter comprises: a series combination of an n-type transistor and a p-type transistor connected to receive the comparator output signal at their gate nodes and connected at channel nodes to the inverter output node; an additional transistor connected at a channel node to the inverter output node and in parallel with one of the transistors in the series combination; and a switch adapted to selectively apply the comparator output signal to the gate of the additional transistor in order to change the logic threshold level of the configurable inverter.
- Claim: 2. The invention of claim 1 , wherein: the first comparator is an op-amp; and the first output driving device is a first transistor connected to receive, at its gate node, the signal based on the inverter output signal, wherein a channel node of the first transistor is connected to the driver output node.
- Claim: 3. The invention of claim 1 , wherein the driver output node is connected to one or more LCD elements.
- Claim: 4. The invention of claim 3 , wherein the circuitry comprises the one or more LCD elements.
- Claim: 5. The invention of claim 1 , wherein the additional transistor is a p-type transistor, such that closing the switch raises the logic threshold level of the configurable inverter.
- Claim: 6. The invention of claim 1 , wherein the controller is adapted to control the state of the switch in order to reduce the chattering of the driver.
- Claim: 7. The invention of claim 6 , wherein the controller changes the state of the switch when a difference between one of the driver signals and a specified signal level is less than a specified threshold value.
- Claim: 8. The invention of claim 1 , wherein: the first comparator is a first op-amp connected to receive the driver input signal at its positive input and the driver output signal at its negative input and is adapted to generate a first op-amp output signal; the configurable inverter is connected to receive the first op-amp output signal at its input node and is adapted to present an inverted version of the first op-amp output signal at its output node; the first output driving device is an n-type transistor connected to receive the inverted version of the first op-amp output signal at its gate node; the driver further comprises: a second op-amp connected to receive the driver input signal at its negative input and the driver output signal at its positive input and is adapted to generate a second op-amp output signal; and a p-type transistor connected to receive the second op-amp output signal at its gate node; and channel nodes of the n-type and p-type transistors are connected to the driver output node.
- Claim: 9. A method for generating a driver output signal presented at a driver output node based on a driver input signal applied at a driver input node, the method comprising: (a) comparing the driver output signal to the driver input signal to generate a comparator output signal; (b) generating, using a configurable inverter, an inverted version of the comparator output signal as an inverter output signal presented at an inverter output node, wherein the configurable inverter is adapted to be selectively configured to provide any one of at least two different inverter logic threshold levels; (c) applying a signal based on the inverter output signal to a first output driving device connected at an output node to the driver output node; and (d) controlling the inverter logic threshold level of the configurable inverter to reduce chattering in the driver output signal, wherein the configurable inverter comprises: a series combination of an n-type transistor and a p-type transistor connected to receive the comparator output signal at their gate nodes and connected at channel nodes to the inverter output node; an additional transistor connected at a channel node to the inverter output node and in parallel with one of the transistors in the series combination; and a switch adapted to selectively apply the comparator output signal to the gate of the additional transistor in order to change the logic threshold level of the configurable inverter.
- Claim: 10. The invention of claim 9 , further comprising applying the driver output signal to one or more LCD elements.
- Claim: 11. The invention of claim 9 , wherein: the configurable inverter is configured to provide a first inverter logic threshold level that is equivalent to a driver common-mode voltage to provide relatively high driver symmetry; and the configurable inverter is configured to provide a second inverter logic threshold level that is greater than the driver common-mode voltage to inhibit chattering in the driver output signal.
- Claim: 12. The invention of claim 9 , wherein the additional transistor is a p-type transistor, such that closing the switch raises the logic threshold level of the configurable inverter.
- Claim: 13. The invention of claim 9 , wherein step (d) comprises controlling the state of the switch in order to reduce the chattering of the driver.
- Claim: 14. The invention of claim 13 , comprising changing the state of the switch when a difference between one of the driver signals and a specified signal level is less than a specified threshold value.
- Claim: 15. The invention of claim 13 , comprising changing the state of the switch after a specified duration.
- Claim: 16. The invention of claim 9 , comprising: applying (1) the driver input signal at a positive input of a first op-amp and (2) the driver output signal at a negative input of the first op-amp to generate a first op-amp output signal; presenting an inverted version of the first op-amp output signal at an output node of the configurable inverter; applying the inverted version of the first op-amp output signal at the gate node of an n-type transistor; applying (1) the driver input signal at a negative input of a second op-amp and (2) the driver output signal at a positive input of the second op-amp to generate a second op-amp output signal; applying the second op-amp output signal at the gate node of a p-type transistor, where channel nodes of the n-type and p-type transistors are connected to the driver output node.
- Claim: 17. In an LCD driver for providing a voltage signal to an LCD electrode , a voltage signal generator comprising: an input node; an output node; a first differential amplifier including first and second input terminals and an output terminal, wherein: the first input terminal of the first differential amplifier is coupled so as to receive an input voltage signal appearing at the input node of the voltage signal generator; and the second input terminal of the first differential amplifier is coupled so as to receive an output voltage signal appearing at the output node of the voltage signal generator; a second differential amplifier including first and second input terminals and an output terminal, wherein: the first input terminal of the second differential amplifier is coupled so as to receive the input voltage signal; and the second input terminal of the second differential amplifier is coupled so as to receive the output voltage signal; an inverter having an input terminal and an output terminal, the input terminal of the inverter being coupled to the output terminal of the first differential amplifier; a first current source having a control terminal and an output terminal, wherein: the control terminal of the first current source is coupled to the output terminal of the inverter; and the output terminal of the first current source is coupled to the output node of the voltage signal generator; a second current source having a control terminal and an output terminal, wherein: the control terminal of the second current source is coupled to the output terminal of the second differential amplifier; and the output terminal of the second current source is coupled to the output node of the voltage signal generator, wherein the inverter is adapted to selectively provide any one of at least two different logic threshold levels; and a controller adapted to control the logic threshold level of the inverter to reduce chattering in the output voltage signal, wherein the inverter comprises; a series combination of a p-type transistor and an n-type transistor connected at their gate nodes to the output terminal of the first differential amplifier and connected at channel nodes to the inverter output terminal; an additional transistor connected at a channel node to the inverter output terminal and in parallel with one of the transistors in the series combination; and a switch adapted to selectively connect output terminal of the first differential amplifier to the gate of the additional transistor in order to change the logic threshold level of the inverter.
- Claim: 18. The invention of claim 17 , wherein the controller is adapted to control the state of the switch in order to reduce the chattering in the LCD driver.
- Claim: 19. The invention of claim 18 , wherein the controller changes the state of the switch when a difference between a driver signal and a specified signal level is less than a specified threshold value.
- Current U.S. Class: 345/98
- Patent References Cited: 2004/0095306 May 2004 Fujiyoshi
- Other References: “A Class-B Output Buffer for Flat-Panel-Display Column Driver,” by Pang-Cheng Yu and Jin-Chuan Wu; IEEE Journal Of Solid-State Circuits, vol. 54, No. 1, Jan. 1999, pp. 116-119. cited by other
- Assistant Examiner: Willis, Randal
- Primary Examiner: Awad, Amr
- Attorney, Agent or Firm: Mendelsohn, Drucker & Associates, PC ; Mendelsohn, Steve
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