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Printed wiring board with built-in semiconductor element, and process for producing the same

Yoshino, Yutaka ; Shirai, Takahiro ; et al.
2011
Online Patent

Titel:
Printed wiring board with built-in semiconductor element, and process for producing the same
Autor/in / Beteiligte Person: Yoshino, Yutaka ; Shirai, Takahiro ; Kadono, Shinji ; Kawamoto, Mineo ; Enomoto, Minoru ; Goto, Masakatsu ; Araki, Makoto ; Toda, Naoki
Link:
Veröffentlichung: 2011
Medientyp: Patent
Sonstiges:
  • Nachgewiesen in: USPTO Patent Grants
  • Sprachen: English
  • Patent Number: 7,894,200
  • Publication Date: February 22, 2011
  • Appl. No: 11/913559
  • Application Filed: November 28, 2006
  • Assignees: CMK Corporation (Tokyo, JP), Renesas Eastern Japan Semiconductor, Inc. (Tokyo, JP)
  • Claim: 1. A printed wiring board, comprising: a built-in semiconductor element, a protective film formed on a semiconductor element-mounted surface of a base substrate to which the built-in semiconductor element is connected to protect the semiconductor element-mounted surface excepting a mounting pad, a lower surface of the built-in semiconductor element covered with a first insulating film formed by filling a sealing material, and a gap around the built-in semiconductor element and the first insulating film filled with a second insulating film formed of an insulating resin melted from an insulating layer that is provided in side and upper portions of the built-in semiconductor element.
  • Claim: 2. The printed wiring board according to claim 1 , wherein a side insulating layer is formed of a prepreg material or a build-up base material.
  • Claim: 3. The printed wiring board according to claim 1 , wherein an upper insulating layer is formed of a prepreg material or a build-up base material.
  • Claim: 4. The printed wiring board according to claim 1 , wherein a linear expansion coefficient of the first insulating film is different from that of the second insulating film.
  • Claim: 5. The printed wiring board according to claim 1 , wherein a passive component is disposed under the built-in semiconductor element.
  • Claim: 6. The printed wiring board according to claim 5 , wherein the passive component is connected to the built-in semiconductor element through an interlayer connection via.
  • Claim: 7. The printed wiring board according to claim 5 , wherein the passive component is any one of a resistor, a capacitor, a coil, and an inductor, or a combination of two or more thereof.
  • Current U.S. Class: 361/761
  • Patent References Cited: 7307852 December 2007 Inagaki et al. ; 7435910 October 2008 Sakamoto et al. ; 2003/0090883 May 2003 Asahi et al. ; 2003/0150641 August 2003 Kinayman et al. ; 2003/0183920 October 2003 Goodrich et al. ; 2005/0157478 July 2005 Inagaki et al. ; 2006/0003495 January 2006 Sunohara et al. ; 2006/0087020 April 2006 Hirano et al. ; 2001 44641 February 2001 ; 2002 344146 November 2002 ; 2005 39094 February 2005
  • Assistant Examiner: Nguyen, Hoa C
  • Primary Examiner: Levi, Dameon E
  • Attorney, Agent or Firm: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.

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