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- Nachgewiesen in: USPTO Patent Grants
- Sprachen: English
- Patent Number: 11889,770
- Publication Date: January 30, 2024
- Appl. No: 16/850862
- Application Filed: April 16, 2020
- Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION (Armonk, NY, US)
- Claim: 1. A quantum device, comprising: a substrate; and a coplanar waveguide, comprising: a first return conductor line, a second return conductor line, and a central conductor line located between and separated from the first return line conductor line and the second return conductor line, wherein the central conductor line comprises one or more base conductor portions disposed directly on the substrate, and a bridge portion disposed over a portion of the substrate, wherein a gap of a defined distance is formed between the bridge portion of the central conductor line and a surface of the portion of the substrate that is facing the bridge portion.
- Claim: 2. The device of claim 1 , wherein the bridge portion is a first bridge portion, and wherein the central conductor line comprises a set of bridge portions, including the first bridge portion and a second bridge portion, and wherein a base conductor portion of the one or more base conductor portions is disposed directly on the substrate and situated between the first bridge portion and the second bridge portion.
- Claim: 3. The device of claim 2 , wherein the first bridge portion and the second bridge portion are raised above the one or more base conductor portions and the surface of the substrate to form gaps, comprising the gap, between the substrate and the first bridge portion and the second bridge portion.
- Claim: 4. The device of claim 1 , wherein a conductive layer is disposed on the substrate, wherein the conductive layer comprises a first portion of the conductive layer, a second portion of the conductive layer, and the central conductor line situated between the first portion of the conductive layer and the second portion of the conductive layer with a first space formed between the central conductor line and the first portion of the conductive layer and a second space formed between the central conductor line and the second portion of the conductive layer.
- Claim: 5. The device of claim 1 , wherein the defined distance formed between the bridge portion of the central conductor line and the surface of the portion of the substrate reduces energy loss associated with the substrate without exceeding a defined threshold amount of distance, in accordance with a defined circuit design criterion.
- Claim: 6. The device of claim 1 , wherein the central conductor line is formed of a superconducting material.
- Claim: 7. The device of claim 1 , wherein the substrate comprises a dielectric material and has a thermal conductivity level that is equal to or greater than a defined threshold conductivity level.
- Claim: 8. The device of claim 1 , wherein the substrate and the coplanar waveguide are part of a quantum computing circuit that comprises a qubit.
- Claim: 9. A method, comprising: forming a substrate of a quantum device; and forming a coplanar waveguide, comprising: a first return conductor line, a second return conductor line, and a central conductor line located between and separated from the first return line conductor line and the second return conductor line, wherein the central conductor line comprises one or more base conductor portions disposed directly on the substrate, and a bridge conductor portion disposed over a portion of the substrate, wherein a gap of a defined distance is formed between the bridge conductor portion of the conductor line and a surface of the portion of the substrate that is facing the bridge conductor portion.
- Claim: 10. The method of claim 9 , wherein the bridge conductor portion is a first bridge conductor portion, and wherein the forming the conductor line comprises forming the conductor line comprising a set of bridge conductor portions, including the first bridge conductor portion and a second bridge conductor portion, and further comprising a base conductor portion of the one or more base conductor portions disposed directly on the substrate and situated between the first bridge conductor portion and the second bridge conductor portion.
- Claim: 11. The method of claim 10 , wherein the first bridge conductor portion and the second bridge conductor portion are formed at an elevated level relative to the one or more base conductor portions and the surface of the substrate to form gaps, comprising the gap, between the substrate and the first bridge conductor portion and the second bridge conductor portion.
- Claim: 12. The method of claim 9 , wherein a conductive layer is disposed on the substrate, and wherein the conductive layer comprises a first portion of the conductive layer, a second portion of the conductive layer, and the conductor line situated between the first portion of the conductive layer and the second portion of the conductive layer, with a first space formed between the conductor line and the first portion of the conductive layer and a second space formed between the conductor line and the second portion of the conductive layer.
- Claim: 13. The method of claim 9 , wherein the conductor line is formed of a superconducting material, and wherein the substrate comprises a dielectric material and has a thermal conductivity level that is equal to or greater than a defined minimum threshold conductivity level.
- Claim: 14. The method of claim 9 , wherein the substrate and the coplanar waveguide are part of a quantum computing circuit that comprises a qubit.
- Claim: 15. A computer program product that facilitates creating a quantum computing circuit, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions are executable by a processor to cause the processor to: form a dielectric substrate comprising a dielectric material to enable creation of circuit components of the quantum computing circuit; and form a coplanar waveguide, comprising: a first return conductor line, a second return conductor line, and a central conductor line located between and separated from the first return line conductor line and the second return conductor line, wherein the central conductor line comprises one or more base conductor portions disposed directly on the dielectric substrate, and a bridge portion disposed over a portion of the dielectric substrate, wherein a gap of a defined distance is formed between the bridge portion of the central conductor line and a surface of the portion of the dielectric substrate that is facing the bridge portion, and wherein the conductor line comprises a superconductor material.
- Claim: 16. The computer program product of claim 15 , wherein the bridge portion is a first bridge portion, and wherein the central conductor line comprises a set of bridge portions, including the first bridge portion and a second bridge portion, and wherein a base conductor portion of the one or more base conductor portions is disposed directly on the substrate and situated between the first bridge portion and the second bridge portion.
- Claim: 17. The computer program product of claim 16 , wherein the first bridge portion and the second bridge portion are raised above the one or more base conductor portions and the surface of the substrate to form gaps, comprising the gap, between the substrate and the first bridge portion and the second bridge portion.
- Claim: 18. The computer program product of claim 15 , wherein a conductive layer is disposed on the substrate, wherein the conductive layer comprises a first portion of the conductive layer, a second portion of the conductive layer, and the central conductor line situated between the first portion of the conductive layer and the second portion of the conductive layer with a first space formed between the central conductor line and the first portion of the conductive layer and a second space formed between the central conductor line and the second portion of the conductive layer.
- Claim: 19. The computer program product of claim 15 , wherein the defined distance formed between the bridge portion of the central conductor line and the surface of the portion of the substrate reduces energy loss associated with the substrate without exceeding a defined threshold amount of distance, in accordance with a defined circuit design criterion.
- Claim: 20. The computer program product of claim 15 , wherein the central conductor line is formed of a superconducting material.
- Claim: 21. The computer program product of claim 15 , wherein the substrate comprises a dielectric material and has a thermal conductivity level that is equal to or greater than a defined threshold conductivity level.
- Claim: 22. The computer program product of claim 15 , wherein the quantum computing circuit comprises a qubit.
- Claim: 23. A system, comprising: a memory that stores computer-executable components; and a processor, operatively coupled to the memory, that executes the computer-executable components, the computer-executable components comprising: a substrate formation component that forms a dielectric substrate as part of a quantum computing circuit; and a conductor formation component that forms a coplanar waveguide, comprising: a first return conductor line, a second return conductor line, and a central conductor line located between and separated from the first return line conductor line and the second return conductor line, wherein the central conductor line comprises one or more base conductor portions disposed directly on the dielectric substrate, and a bridge conductor portion positioned over a portion of the dielectric substrate, wherein a space of a defined distance is formed between the bridge conductor portion of the central conductor line and a surface of the portion of the dielectric substrate that is facing the bridge conductor portion.
- Claim: 24. The system of claim 23 , wherein the bridge conductor portion is a first bridge conductor portion, and wherein the conductor formation component forms the conductor line component to comprise a set of bridge conductor portions, including the first bridge conductor portion and a second bridge conductor portion, and a base conductor portion of the one or more base conductor portions, wherein the base conductor portion is disposed directly on the dielectric substrate and positioned between the first bridge conductor portion and the second bridge conductor portion, and wherein the first bridge conductor portion and the second bridge conductor portion are at an elevated level as compared to the base conductor portion and the surface of the dielectric substrate to form spaces, comprising the space, between the dielectric substrate and the first bridge conductor portion and the second bridge conductor portion.
- Claim: 25. A computer program product that facilitates forming a quantum computing circuit, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions are executable by a processor to cause the processor to: form a substrate comprising a dielectric material to enable creation of circuit components of the quantum computing circuit; and form a coplanar waveguide, comprising: a first return conductor line, a second return conductor line, and a central conductor line located between and separated from the first return line conductor line and the second return conductor line, wherein the central conductor line comprises one or more base conductor portions disposed directly on the substrate, and a bridge conductor portion positioned over a portion of the substrate, wherein a space of a defined distance is formed between the bridge conductor portion of the conductor line and a surface of the portion of the substrate that is facing the bridge conductor portion.
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- Other References: A. Dunsworth, “Low Loss Multi-Layer Wiring for Superconducting Microwave Devices”, Dec. 6, 2017, Department of Physics, University of California, Santa Barbara, California, 93106-9530 and Google Inc., Santa Barbara, CA 93117 USA (Year: 2017). cited by examiner ; International Search Report and Written Opinion for International Application Serial No. PCT/EP2021/056604 dated Jun. 22, 2021, 13 pages. cited by applicant ; Dunsworth et al., “A method for building low loss multi-layer wiring for superconducting microwave devices,” Appl. Phys. Lett. 112, 063502, Feb. 6, 2018, 5 pages. cited by applicant ; Zheng et al., “Ship-bridge collision monitoring system based on flexible quantum tunneling composite with cushioning capability,” Smart Materials and Structures, vol. 27, No. 7, Jun. 1, 2018, 21 pages. cited by applicant ; Weller et al., “The Effects of Line Width and Slot Etching on Silicon-Based CPW at MM-Wave Frequencies,” Physical Review Applied, vol. 12, No. 1, Jul. 2019, 9 pages. cited by applicant ; Sandberg et al., “Etch induced microwave losses in titanium nitride superconducting resonators,” Applied Physics Letters, vol. 100, No. 26, Jun. 2012, 5 pages. cited by applicant ; Woods et al., “Determining interface dielectric losses in superconducting coplanar waveguide resonators,” Physical Review Applied, vol. 12, No. 1, Jul. 2019, 8 pages. cited by applicant ; Office Action received for Chinese Patent Application Serial No. 202180025216.1 dated Oct. 28, 2023, 7 pages (Original Copy Only). cited by applicant
- Primary Examiner: Woldegeorgis, Ermias T
- Attorney, Agent or Firm: Amin, Turocy & Watson, LLP
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