Zum Hauptinhalt springen

CMOS cap for MEMS devices

Meridian Innovation Pte Ltd
2024
Online Patent

Titel:
CMOS cap for MEMS devices
Autor/in / Beteiligte Person: Meridian Innovation Pte Ltd
Link:
Veröffentlichung: 2024
Medientyp: Patent
Sonstiges:
  • Nachgewiesen in: USPTO Patent Grants
  • Sprachen: English
  • Patent Number: 11990,498
  • Publication Date: May 21, 2024
  • Appl. No: 17/156639
  • Application Filed: January 25, 2021
  • Assignees: Meridian Innovation Pte Ltd (Singapore, SG)
  • Claim: 1. A device comprising: a substrate prepared with a complementary metal oxide semiconductor (CMOS) region with CMOS devices and a sensor region with micro-electro-mechanical system (MEMS) region with a MEMS component, wherein the MEMS component comprises a thermoelectric IR sensor; and a CMOS compatible cap disposed on the substrate over the CMOS region and MEMS region, wherein the CMOS compatible cap includes CMOS layers, the CMOS compatible cap comprises a first cap portion disposed over the MEMS region, a second cap portion disposed over the CMOS region, and wherein the first cap portion over the MEMS region is elevated above the second cap portion over the CMOS region to create a cap cavity over the MEMS region.
  • Claim: 2. The device of claim 1 wherein the MEMS component comprises an array of thermoelectric IR sensor cells.
  • Claim: 3. The device of claim 2 wherein the CMOS compatible cap comprises: a base cap having a CMOS IR transparent base cap layer, the base cap includes a cap release opening; and a seal cap for sealing the cap release opening in the base cap.
  • Claim: 4. The device of claim 3 wherein the CMOS compatible cap comprises: an outer bearing wall surrounding the MEMS region; and inner bearing walls, wherein the outer bearing wall and inner bearing walls are configured to form micro-casings surrounding the sensor cells.
  • Claim: 5. The device of claim 4 wherein the base cap comprises release openings for the micro-casings.
  • Claim: 6. The device of claim 4 wherein the inner bearing walls comprise channels between adjacent sensor cells to provide homogeneous vacuum across the array of sensor cells.
  • Claim: 7. The device of claim 3 wherein the seal cap comprises a CMOS IR transparent seal cap layer sealing the release opening.
  • Claim: 8. The device of claim 3 wherein the seal cap comprises a CMOS IR non-transparent seal cap layer sealing the release opening, wherein the seal cap layer is patterned to expose the CMOS IR-transparent base cap layer to allow IR transmission to the IR sensor while sealing the base cap; and a CMOS IR transparent seal cap layer disposed over the IR non-transparent patterned seal cap layer.
  • Claim: 9. The device of claim 3 wherein the base cap comprises: a base cap stack with an odd number of CMOS base cap layers; and wherein the odd number of CMOS base cap layers comprises alternating silicon oxide and amorphous silicon layers in which a top base cap layer and a bottom base cap layer of the base cap stack comprise silicon oxide.
  • Claim: 10. The device of claim 3 wherein a bottom surface of the CMOS compatible cap above the MEMS device region is non-planar, the bottom surface of the CMOS compatible cap includes a depression above the MEMS device region.
  • Claim: 11. A device comprising: a substrate prepared with a complementary metal oxide semiconductor (CMOS) region with CMOS devices and a sensor region with micro-electro-mechanical system (MEMS) region with a MEMS component; and a CMOS compatible cap disposed on the substrate over the CMOS region and MEMS region, wherein the CMOS compatible cap includes CMOS layers, the CMOS compatible cap comprises a first cap portion disposed over the MEMS region, a second cap portion disposed over the CMOS region, wherein the first cap portion over the MEMS region is elevated above the second cap portion over the CMOS region to create a cap cavity over the MEMS region, a base cap having at least one cap release opening, and a seal cap for sealing the at least one cap release opening in the base cap.
  • Claim: 12. The device of claim 11 wherein the base cap comprises a CMOS IR transparent base cap layer, the base cap includes a cap release opening.
  • Claim: 13. The device of claim 12 wherein the seal cap comprises a CMOS IR transparent seal cap layer sealing the release opening.
  • Claim: 14. The device of claim 12 wherein the seal cap comprises a CMOS IR non-transparent seal cap layer sealing the release opening, wherein the seal cap layer is patterned to expose the CMOS IR-transparent base cap layer to allow IR transmission to the IR sensor while sealing the base cap; and a CMOS IR transparent seal cap layer disposed over the IR non-transparent patterned seal cap layer.
  • Claim: 15. A device comprising: a substrate prepared with a complementary metal oxide semiconductor (CMOS) region with CMOS devices and a sensor region with micro-electro-mechanical system (MEMS) region with a MEMS component, wherein the MEMS component comprises a thermoelectric IR sensor; and a CMOS compatible cap disposed on the substrate over the CMOS region and MEMS region, wherein the CMOS compatible cap includes CMOS layers, the CMOS compatible cap is elevated over the MEMS region to provide a cap cavity between the CMOS compatible cap and the MEMS region, wherein a bottom surface of the CMOS compatible cap above the MEMS device region is non-planar, the bottom surface of the CMOS compatible cap includes a depression above the MEMS device region, the CMOS compatible cap comprises a base cap having a CMOS IR transparent base cap layer, the base cap includes a cap release opening, and a seal cap for sealing the cap release opening in the base cap.
  • Claim: 16. A device comprising: a substrate prepared with a complementary metal oxide semiconductor (CMOS) region with CMOS devices and a sensor region with micro-electro-mechanical system (MEMS) region with a MEMS component; a CMOS compatible IR transparent cap disposed on the substrate over the CMOS region and MEMS region, wherein the CMOS IR transparent compatible cap includes CMOS layers, the CMOS compatible cap is elevated over the MEMS region to provide a cap cavity between the CMOS compatible cap and the MEMS region; an interlevel dielectric (ILD) layer disposed on the substrate over the CMOS region and MEMS region, covering the CMOS devices and MEMS component, the ILD layer includes ILD contacts coupled to contact regions of the CMOS devices; a back-end-of-line (BEOL) dielectric is disposed on the ILD layer, the BEOL dielectric includes a plurality of intermetal dielectric (IMD) levels, wherein an IMD level includes a metal level with metal lines and a via level thereover with via contacts; and a passivation layer disposed over a top metal level of the BEOL dielectric.
  • Claim: 17. The device of claim 16 wherein BEOL cavities are disposed in the passivation layer, the BEOL dielectric and the ILD layer (BEOL cavity dielectric layer), the BEOL cavities expose IR sensors over lower sensor cavities, wherein the BEOL cavities are separated by the passivation layer, the BEOL dielectric and the ILD layer between the BEOL cavities (inter-BEOL cavity dielectric layer).
  • Claim: 18. The device of claim 16 wherein the MEMS component comprises an array of IR sensors arranged in a matrix format, wherein an IR sensor of the sensor array is disposed over a lower sensor cavity with a cavity bottom and cavity sidewalls defined by the substrate, a dielectric membrane defining a top of the lower sensor cavity, and the IR sensor disposed on the dielectric membrane.
  • Claim: 19. The device of claim 16 wherein the CMOS compatible IR transparent cap comprises: a base cap, the base cap includes a plurality of CMOS compatible IR transparent base cap layers to form a base cap stack, wherein: lower base cap layers of the base cap stack are disposed only locally in the MEMS region of the device, a top base cap layer is disposed globally in the CMOS and MEMS regions, thicknesses and materials of the base cap layers of the base cap stack are configured to achieve high transmission of a selected IR wavelength while maintaining mechanical stability and avoiding high aspect ratio etching, the IR transparent cap defines an upper portion of an upper device cavity over each IR sensor, wherein the IR transparent cap includes an outer bearing walls disposed on the BEOL cavity dielectric layer surrounding the MEMS region and inner bearing walls disposed on the inter-BEOL cavity dielectric layer between adjacent IR sensors, the inner and outer bearing walls creates cap cavities above the BEOL cavities by elevating the IR transparent cap, and the base cap stack comprises a least one release opening for each upper device cavity of each IR sensor for removal of a sacrificial fill, and a seal cap, the base cap seals the at least one release opening for each upper device cavity after removal of the sacrificial fill while maintaining IR transparency of the CMOS compatible cap for the IR sensors.
  • Patent References Cited: 6335478 January 2002 Chou et al. ; 6803250 October 2004 Yaung et al. ; 7755048 July 2010 Hsu ; 9324760 April 2016 Vasseur et al. ; 9505611 November 2016 Liu ; 9577001 February 2017 Enichlmair ; 20030062480 April 2003 Kanzaki ; 20040245586 December 2004 Partridge et al. ; 20070057343 March 2007 Chinthakindi et al. ; 20070170528 July 2007 Partridge et al. ; 20080142912 June 2008 Inaba et al. ; 20080216883 September 2008 Leneke et al. ; 20090243004 October 2009 Lan et al. ; 20100031992 February 2010 Hsu ; 20100181484 July 2010 Inada et al. ; 20100243892 September 2010 Dupont ; 20100314668 December 2010 Ollier ; 20110147869 June 2011 Lazarov et al. ; 20110291167 December 2011 Shimooka ; 20120056291 March 2012 Suzuki et al. ; 20120061569 March 2012 Noguchi ; 20120097415 April 2012 Reinert et al. ; 20130234270 September 2013 Yama et al. ; 20130285165 October 2013 Classen et al. ; 20150076651 March 2015 Noguchi ; 20150168221 June 2015 Mao et al. ; 20150177069 June 2015 Maes et al. ; 20150210540 July 2015 Sadaka et al. ; 20150243823 August 2015 Herrmann et al. ; 20150321905 November 2015 Gooch et al. ; 20160079306 March 2016 Kropelnicki et al. ; 20160130137 May 2016 Huang ; 20160214855 July 2016 Yeh et al. ; 20160264402 September 2016 Yu et al. ; 20160289063 October 2016 Ocak et al. ; 20160318758 November 2016 Chou et al. ; 20160332867 November 2016 Tseng et al. ; 20160379961 December 2016 Lee et al. ; 20170107097 April 2017 Cheng et al. ; 20170107100 April 2017 Cheng ; 20170179119 June 2017 Chang et al. ; 20170203956 July 2017 Breitling et al. ; 20170217757 August 2017 Deas ; 20180257927 September 2018 Rothberg et al. ; 20180312399 November 2018 Singh ; 20190027522 January 2019 Kropelnicki et al. ; 20190092627 March 2019 Lin ; 20210246014 August 2021 Chang ; 101578687 November 2009 ; 104501970 April 2015 ; 106744656 May 2017 ; 2105963 September 2009 ; 2264765 December 2010 ; 201339544 October 2013 ; 2014100706 June 2014
  • Other References: J. H. Smith et al., Embedded Micromechanical Devices for the Monolithic Integration of MEMS with CMOS, IEEE International Electron Devices Meeting, Dec. 10-13, 1995, pp. 1-5, Sandia National Labs., Albuquerque, New Mexico, U.S.A. cited by applicant ; A Graf et al, Review of micromachined thermopiles for infrared detection, Measurement Science and Technology, Jul. 1, 2007, pp. R59-R75, vol. 18, No. 7, IOP Publishing, Bristol, GB. cited by applicant
  • Primary Examiner: Boulghassoul, Younes
  • Attorney, Agent or Firm: HORIZON IP PTE LTD

Klicken Sie ein Format an und speichern Sie dann die Daten oder geben Sie eine Empfänger-Adresse ein und lassen Sie sich per Email zusenden.

oder
oder

Wählen Sie das für Sie passende Zitationsformat und kopieren Sie es dann in die Zwischenablage, lassen es sich per Mail zusenden oder speichern es als PDF-Datei.

oder
oder

Bitte prüfen Sie, ob die Zitation formal korrekt ist, bevor Sie sie in einer Arbeit verwenden. Benutzen Sie gegebenenfalls den "Exportieren"-Dialog, wenn Sie ein Literaturverwaltungsprogramm verwenden und die Zitat-Angaben selbst formatieren wollen.

xs 0 - 576
sm 576 - 768
md 768 - 992
lg 992 - 1200
xl 1200 - 1366
xxl 1366 -