A 1-V CMOS Ultralow-Power Receiver Front End for the IEEE 802.15.4 Standard Using Tuned Passive Mixer Output Pole
In: VLSI-SoC: Forward-Looking Trends in IC and Systems Design : 18th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, Jg. 373 (2012), S. 1-21
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Titel: |
A 1-V CMOS Ultralow-Power Receiver Front End for the IEEE 802.15.4 Standard Using Tuned Passive Mixer Output Pole
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Autor/in / Beteiligte Person: | Do, Aaron V. T. ; Boon, Chirn Chye ; Krishna, Manthena Vamshi ; Do, Anh Manh ; Yeo, Kiat Seng ; Ayala, José L. [Ed.] ; Atienza Alonso, David [Ed.] ; Reis, Ricardo [Ed.] |
Zeitschrift: | VLSI-SoC: Forward-Looking Trends in IC and Systems Design : 18th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, Jg. 373 (2012), S. 1-21 |
Veröffentlichung: | 2012 |
Medientyp: | E-Book |
ISBN: | 978-3-642-28565-3 (print) ; 978-3-642-28566-0 (print) |
DOI: | 10.1007/978-3-642-28566-0_1 |
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