A fully-integrated 5 Gbit/s CMOS clock and data recovery circuit
In: Analog Integrated Circuits and Signal Processing: An International Journal, Jg. 51 (2007-05-01), Heft 2, S. 101-109
Online
academicJournal
Zugriff:
Titel: |
A fully-integrated 5 Gbit/s CMOS clock and data recovery circuit
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Autor/in / Beteiligte Person: | Kok-Siang, Tan ; Sulaiman, Mohd-Shahiman ; Reaz, Mamun ; Hean-Teik, Chuah ; Sachdev, Manoj |
Link: | |
Zeitschrift: | Analog Integrated Circuits and Signal Processing: An International Journal, Jg. 51 (2007-05-01), Heft 2, S. 101-109 |
Veröffentlichung: | 2007 |
Medientyp: | academicJournal |
ISSN: | 0925-1030 (print) ; 1573-1979 (print) |
DOI: | 10.1007/s10470-007-9062-8 |
Sonstiges: |
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