Optimizing Drain Current, Inversion Level, and Channel Length in Analog CMOS Design
In: Analog Integrated Circuits and Signal Processing: An International Journal, Jg. 47 (2006-05-01), Heft 2, S. 137-163
Online
academicJournal
Zugriff:
Titel: |
Optimizing Drain Current, Inversion Level, and Channel Length in Analog CMOS Design
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Autor/in / Beteiligte Person: | Binkley, D. M. ; Blalock, B. J. ; Rochelle, J. M. |
Link: | |
Zeitschrift: | Analog Integrated Circuits and Signal Processing: An International Journal, Jg. 47 (2006-05-01), Heft 2, S. 137-163 |
Veröffentlichung: | 2006 |
Medientyp: | academicJournal |
ISSN: | 0925-1030 (print) ; 1573-1979 (print) |
DOI: | 10.1007/s10470-006-2949-y |
Sonstiges: |
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