Power-efficient VLSI realization of decimal convolution algorithms for resource-constrained environments: a design perspective in CMOS and double-gate CMOS technology
In: Microsystem Technologies: Micro- and NanosystemsInformation Storage and Processing Systems, 2024-04-21, S. 1-13
Online
academicJournal
Zugriff:
Titel: |
Power-efficient VLSI realization of decimal convolution algorithms for resource-constrained environments: a design perspective in CMOS and double-gate CMOS technology
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Autor/in / Beteiligte Person: | Ahmed, Rekib Uddin ; Thakur, Harsh Raj ; Seenivasan, M. A. ; Saha, Prabir |
Link: | |
Zeitschrift: | Microsystem Technologies: Micro- and NanosystemsInformation Storage and Processing Systems, 2024-04-21, S. 1-13 |
Veröffentlichung: | 2024 |
Medientyp: | academicJournal |
ISSN: | 0946-7076 (print) ; 1432-1858 (print) |
DOI: | 10.1007/s00542-024-05667-2 |
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