A 2.8-to-5.8 GHz harmonic VCO in a 28 nm UTBB FD-SOI CMOS process
In: IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2015,Phoenix, Arizona, United States,-- 2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) ELLIIT: the Linköping-Lund initiative on IT and mobile communication, 2015, S. 195-198
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Zugriff:
A 2.8-to-5.8GHz VCO designed in a 28nm UTBB FD-SOI CMOS process adopts a reconfigurable active core to save power at the lower oscillation frequencies, and to enable a trade-off between power consumption and phase noise at all frequencies. The UTBB FD-SOI CMOS process is instrumental to achieve a tuning range in excess of one octave at low power consumption, while the use of an 8-shaped tank coil yields a VCO that is highly insensitive to external magnetic fields. The VCO operates from 0.9V and has a figure-of-merit of 186-189 dBc/Hz, depending on the oscillation frequency and the configuration of the oscillator core. The active area of the VCO is 380 μm × 700 μm.
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A 2.8-to-5.8 GHz harmonic VCO in a 28 nm UTBB FD-SOI CMOS process
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Autor/in / Beteiligte Person: | Fanori, Luca ; Mahmoud, Ahmed ; Mattsson, Thomas ; Caputa, Peter ; Rämö, Sami ; Andreani, Piero |
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Zeitschrift: | IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2015,Phoenix, Arizona, United States,-- 2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) ELLIIT: the Linköping-Lund initiative on IT and mobile communication, 2015, S. 195-198 |
Veröffentlichung: | 2015 |
Medientyp: | unknown |
DOI: | 10.1109/RFIC.2015.7337738 |
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